Volume 2B Instruction Set Reference N-Z (794102), страница 75
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2B B-67INSTRUCTION FORMATS AND ENCODINGSTable B-23. Format and Encoding of SSE Cacheability & Memory OrderingInstructions (Contd.)Instruction and FormatEncodingMOVNTQ—Store Quadword Using Non-TemporalHintmmreg to mem0000 1111:1110 0111: mod mmreg r/mPREFETCHT0—Prefetch Temporal to All CacheLevels0000 1111:0001 1000:modA 001 memPREFETCHT1—Prefetch Temporal to First LevelCache0000 1111:0001 1000:modA 010 memPREFETCHT2—Prefetch Temporal to Second LevelCache0000 1111:0001 1000:modA 011 memPREFETCHNTA—Prefetch Non-Temporal to All CacheLevels0000 1111:0001 1000:modA 000 memSFENCE—Store Fence0000 1111:1010 1110:11 111 000B.8SSE2 INSTRUCTION FORMATS AND ENCODINGSThe SSE2 instructions use the ModR/M format and are preceded by the 0FH prefixbyte. In general, operations are not duplicated to provide two directions (that is,separate load and store variants).The following three tables show the formats and encodings for the SSE2 SIMDfloating-point, SIMD integer, and cacheability instructions, respectively.
Some SSE2instructions require a mandatory prefix (66H, F2H, F3H) as part of the two-byteopcode. These prefixes are included in the tables.B.8.1Granularity Field (gg)The granularity field (gg) indicates the size of the packed operands that the instruction is operating on. When this field is used, it is located in bits 1 and 0 of the secondopcode byte. Table B-24 shows the encoding of this gg field.Table B-24. Encoding of Granularity of Data Field (gg)ggB-68 Vol. 2BGranularity of Data00Packed Bytes01Packed Words10Packed Doublewords11QuadwordINSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point InstructionsInstruction and FormatEncodingADDPD—Add Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 1000:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1000: mod xmmreg r/mADDSD—Add Scalar Double-PrecisionFloating-Point Valuesxmmreg to xmmreg1111 0010:0000 1111:0101 1000:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:0101 1000: mod xmmreg r/mANDNPD—Bitwise Logical AND NOTof Packed Double-Precision FloatingPoint Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 0101:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 0101: mod xmmreg r/mANDPD—Bitwise Logical AND of PackedDouble-Precision Floating-Point Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 0100:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 0100: mod xmmreg r/mCMPPD—Compare Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg, imm80110 0110:0000 1111:1100 0010:11 xmmreg1xmmreg2: imm8mem to xmmreg, imm80110 0110:0000 1111:1100 0010: mod xmmreg r/m:imm8CMPSD—Compare Scalar DoublePrecision Floating-Point Valuesxmmreg to xmmreg, imm81111 0010:0000 1111:1100 0010:11 xmmreg1xmmreg2: imm8mem to xmmreg, imm811110 010:0000 1111:1100 0010: mod xmmreg r/m:imm8COMISD—Compare Scalar OrderedDouble-Precision Floating-PointValues and Set EFLAGSVol.
2B B-69INSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and FormatEncodingxmmreg to xmmreg0110 0110:0000 1111:0010 1111:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0010 1111: mod xmmreg r/mCVTPI2PD—Convert PackedDoubleword Integers to PackedDouble-Precision Floating-PointValuesmmreg to xmmreg0110 0110:0000 1111:0010 1010:11 xmmreg1mmreg1mem to xmmreg0110 0110:0000 1111:0010 1010: mod xmmreg r/mCVTPD2PI—Convert Packed DoublePrecision Floating-Point Values toPacked Doubleword Integersxmmreg to mmreg0110 0110:0000 1111:0010 1101:11 mmreg1xmmreg1mem to mmreg0110 0110:0000 1111:0010 1101: mod mmreg r/mCVTSI2SD—Convert DoublewordInteger to Scalar Double-PrecisionFloating-Point Valuer32 to xmmreg11111 0010:0000 1111:0010 1010:11 xmmreg r32mem to xmmreg1111 0010:0000 1111:0010 1010: mod xmmreg r/mCVTSD2SI—Convert Scalar DoublePrecision Floating-Point Value toDoubleword Integerxmmreg to r321111 0010:0000 1111:0010 1101:11 r32 xmmregmem to r321111 0010:0000 1111:0010 1101: mod r32 r/mCVTTPD2PI—Convert with TruncationPacked Double-Precision FloatingPoint Values to Packed DoublewordIntegersxmmreg to mmreg0110 0110:0000 1111:0010 1100:11 mmreg xmmregmem to mmreg0110 0110:0000 1111:0010 1100: mod mmreg r/mCVTTSD2SI—Convert withTruncation Scalar Double-PrecisionFloating-Point Value to DoublewordIntegerxmmreg to r32B-70 Vol.
2B1111 0010:0000 1111:0010 1100:11 r32 xmmregINSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and Formatmem to r32Encoding1111 0010:0000 1111:0010 1100: mod r32 r/mCVTPD2PS—Covert Packed DoublePrecision Floating-Point Values toPacked Single-Precision FloatingPoint Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 1010:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1010: mod xmmreg r/mCVTPS2PD—Covert Packed SinglePrecision Floating-Point Values toPacked Double-Precision FloatingPoint Valuesxmmreg to xmmreg0000 1111:0101 1010:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1010: mod xmmreg r/mCVTSD2SS—Covert Scalar DoublePrecision Floating-Point Value toScalar Single-Precision Floating-PointValuexmmreg to xmmreg1111 0010:0000 1111:0101 1010:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:0101 1010: mod xmmreg r/mCVTSS2SD—Covert Scalar SinglePrecision Floating-Point Value toScalar Double-Precision FloatingPoint Valuexmmreg to xmmreg1111 0011:0000 1111:0101 1010:11 xmmreg1xmmreg2mem to xmmreg1111 0011:00001 111:0101 1010: mod xmmreg r/mCVTPD2DQ—Convert Packed DoublePrecision Floating-Point Values toPacked Doubleword Integersxmmreg to xmmreg1111 0010:0000 1111:1110 0110:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:1110 0110: mod xmmreg r/mVol.
2B B-71INSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and FormatEncodingCVTTPD2DQ—Convert WithTruncation Packed Double-PrecisionFloating-Point Values to PackedDoubleword Integersxmmreg to xmmreg0110 0110:0000 1111:1110 0110:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:1110 0110: mod xmmreg r/mCVTDQ2PD—Convert PackedDoubleword Integers to PackedSingle-Precision Floating-PointValuesxmmreg to xmmreg1111 0011:0000 1111:1110 0110:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:1110 0110: mod xmmreg r/mCVTPS2DQ—Convert Packed SinglePrecision Floating-Point Values toPacked Doubleword Integersxmmreg to xmmreg0110 0110:0000 1111:0101 1011:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1011: mod xmmreg r/mCVTTPS2DQ—Convert WithTruncation Packed Single-PrecisionFloating-Point Values to PackedDoubleword Integersxmmreg to xmmreg1111 0011:0000 1111:0101 1011:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1011: mod xmmreg r/mCVTDQ2PS—Convert PackedDoubleword Integers to PackedDouble-Precision Floating-PointValuesxmmreg to xmmreg0000 1111:0101 1011:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1011: mod xmmreg r/mDIVPD—Divide Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 1110:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1110: mod xmmreg r/mB-72 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and FormatEncodingDIVSD—Divide Scalar DoublePrecision Floating-Point Valuesxmmreg to xmmreg1111 0010:0000 1111:0101 1110:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:0101 1110: mod xmmreg r/mMAXPD—Return Maximum PackedDouble-Precision Floating-PointValuesxmmreg to xmmreg0110 0110:0000 1111:0101 1111:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1111: mod xmmreg r/mMAXSD—Return Maximum ScalarDouble-Precision Floating-Point Valuexmmreg to xmmreg1111 0010:0000 1111:0101 1111:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:0101 1111: mod xmmreg r/mMINPD—Return Minimum PackedDouble-Precision Floating-PointValuesxmmreg to xmmreg0110 0110:0000 1111:0101 1101:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1101: mod xmmreg r/mMINSD—Return Minimum ScalarDouble-Precision Floating-Point Valuexmmreg to xmmreg1111 0010:0000 1111:0101 1101:11 xmmreg1xmmreg2mem to xmmreg1111 0010:0000 1111:0101 1101: mod xmmreg r/mMOVAPD—Move Aligned PackedDouble-Precision Floating-PointValuesxmmreg2 to xmmreg10110 0110:0000 1111:0010 1001:11 xmmreg2xmmreg1mem to xmmreg10110 0110:0000 1111:0010 1001: mod xmmreg r/mxmmreg1 to xmmreg20110 0110:0000 1111:0010 1000:11 xmmreg1xmmreg2xmmreg1 to mem0110 0110:0000 1111:0010 1000: mod xmmreg r/mVol.
2B B-73INSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and FormatEncodingMOVHPD—Move High Packed DoublePrecision Floating-Point Valuesmem to xmmreg0110 0110:0000 1111:0001 0111: mod xmmreg r/mxmmreg to mem0110 0110:0000 1111:0001 0110: mod xmmreg r/mMOVLPD—Move Low Packed DoublePrecision Floating-Point Valuesmem to xmmreg0110 0110:0000 1111:0001 0011: mod xmmreg r/mxmmreg to mem0110 0110:0000 1111:0001 0010: mod xmmreg r/mMOVMSKPD—Extract Packed DoublePrecision Floating-Point Sign Maskxmmreg to r320110 0110:0000 1111:0101 0000:11 r32 xmmregMOVSD—Move Scalar DoublePrecision Floating-Point Valuesxmmreg2 to xmmreg11111 0010:0000 1111:0001 0001:11 xmmreg2xmmreg1mem to xmmreg11111 0010:0000 1111:0001 0001: mod xmmreg r/mxmmreg1 to xmmreg21111 0010:0000 1111:0001 0000:11 xmmreg1xmmreg2xmmreg1 to mem1111 0010:0000 1111:0001 0000: mod xmmreg r/mMOVUPD—Move Unaligned PackedDouble-Precision Floating-PointValuesxmmreg2 to xmmreg10110 0110:0000 1111:0001 0001:11 xmmreg2xmmreg1mem to xmmreg10110 0110:0000 1111:0001 0001: mod xmmreg r/mxmmreg1 to xmmreg20110 0110:0000 1111:0001 0000:11 xmmreg1xmmreg2xmmreg1 to mem0110 0110:0000 1111:0001 0000: mod xmmreg r/mMULPD—Multiply Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 1001:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1001: mod xmmreg rmB-74 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-25. Formats and Encodings of SSE2 Floating-Point Instructions (Contd.)Instruction and FormatEncodingMULSD—Multiply Scalar DoublePrecision Floating-Point Valuesxmmreg to xmmreg1111 0010:00001111:01011001:11 xmmreg1xmmreg2mem to xmmreg1111 0010:00001111:01011001: mod xmmreg r/mORPD—Bitwise Logical OR ofDouble-Precision Floating-PointValuesxmmreg to xmmreg0110 0110:0000 1111:0101 0110:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 0110: mod xmmreg r/mSHUFPD—Shuffle Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg, imm80110 0110:0000 1111:1100 0110:11 xmmreg1xmmreg2: imm8mem to xmmreg, imm80110 0110:0000 1111:1100 0110: mod xmmreg r/m:imm8SQRTPD—Compute Square Roots ofPacked Double-Precision FloatingPoint Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 0001:11 xmmreg1xmmreg 2mem to xmmreg0110 0110:0000 1111:0101 0001: mod xmmreg r/mSQRTSD—Compute Square Root ofScalar Double-Precision FloatingPoint Valuexmmreg to xmmreg1111 0010:0000 1111:0101 0001:11 xmmreg1xmmreg 2mem to xmmreg1111 0010:0000 1111:0101 0001: mod xmmreg r/mSUBPD—Subtract Packed DoublePrecision Floating-Point Valuesxmmreg to xmmreg0110 0110:0000 1111:0101 1100:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0101 1100: mod xmmreg r/mVol.
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