Volume 2B Instruction Set Reference N-Z (794102), страница 71
Текст из файла (страница 71)
2B B-39INSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingwordregister0101 0101 : 0100 000B : 1111 1111 : 11 110reg16qwordregister0100 W00BS : 1111 1111 : 11 110 reg64wordregister (alternate encoding)0101 0101 : 0100 000B : 0101 0 reg16qwordregister (alternate encoding)0100 W00BS : 0101 0 reg64memory160101 0101 : 0100 000B : 1111 1111 : mod110 r/mmemory640100 W00BS : 1111 1111 : mod 110 r/mimmediate80110 1010 : imm8immediate160101 0101 : 0110 1000 : imm16immediate640110 1000 : imm64PUSH – Push Segment Register onto theStacksegment register FS,GSPUSHF/PUSHFD – Push Flags Register ontothe Stack0000 1111: 10 sreg3 0001001 1100RCL – Rotate thru Carry Leftregister by 10100 000B : 1101 000w : 11 010 regqwordregister by 10100 100B 1101 0001 : 11 010 qwordregmemory by 10100 00XB : 1101 000w : mod 010 r/mmemory64 by 10100 10XB 1101 0001 : mod 010 r/mregister by CL0100 000B : 1101 001w : 11 010 regqwordregister by CL0100 100B 1101 0011 : 11 010 qwordregmemory by CL0100 00XB : 1101 001w : mod 010 r/mmemory64 by CL0100 10XB 1101 0011 : mod 010 r/mregister by immediate count0100 000B : 1100 000w : 11 010 reg : immqwordregister by immediate count0100 100B 1100 0001 : 11 010 qwordreg :imm8memory by immediate count0100 00XB : 1100 000w : mod 010 r/m : immmemory64 by immediate count0100 10XB 1100 0001 : mod 010 r/m : imm8RCR – Rotate thru Carry RightB-40 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingregister by 10100 000B : 1101 000w : 11 011 regqwordregister by 10100 100B 1101 0001 : 11 011 qwordregmemory by 10100 00XB : 1101 000w : mod 011 r/mmemory64 by 10100 10XB 1101 0001 : mod 011 r/mregister by CL0100 000B : 1101 001w : 11 011 regqwordregister by CL0100 000B 1101 0010 : 11 011 qwordregmemory by CL0100 00XB : 1101 001w : mod 011 r/mmemory64 by CL0100 10XB 1101 0011 : mod 011 r/mregister by immediate count0100 000B : 1100 000w : 11 011 reg : imm8qwordregister by immediate count0100 100B 1100 0001 : 11 011 qwordreg :imm8memory by immediate count0100 00XB : 1100 000w : mod 011 r/m : imm8memory64 by immediate count0100 10XB 1100 0001 : mod 011 r/m : imm8RDMSR – Read from Model-Specific Registerload ECX-specified register into EDX:EAX0000 1111 : 0011 0010RDPMC – Read Performance MonitoringCountersload ECX-specified performance counter intoEDX:EAX0000 1111 : 0011 0011RDTSC – Read Time-Stamp Counterread time-stamp counter into EDX:EAX0000 1111 : 0011 0001REP INS – Input StringREP LODS – Load StringREP MOVS – Move StringREP OUTS – Output StringREP STOS – Store StringREPE CMPS – Compare StringREPE SCAS – Scan StringREPNE CMPS – Compare StringREPNE SCAS – Scan StringVol.
2B B-41INSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingRET – Return from Procedure (to samesegment)no argument1100 0011adding immediate to SP1100 0010 : 16-bit displacementRET – Return from Procedure (to othersegment)intersegment1100 1011adding immediate to SP1100 1010 : 16-bit displacementROL – Rotate Leftregister by 10100 000B 1101 000w : 11 000 regbyteregister by 10100 000B 1101 0000 : 11 000 byteregqwordregister by 10100 100B 1101 0001 : 11 000 qwordregmemory by 10100 00XB 1101 000w : mod 000 r/mmemory8 by 10100 00XB 1101 0000 : mod 000 r/mmemory64 by 10100 10XB 1101 0001 : mod 000 r/mregister by CL0100 000B 1101 001w : 11 000 regbyteregister by CL0100 000B 1101 0010 : 11 000 byteregqwordregister by CL0100 100B 1101 0011 : 11 000 qwordregmemory by CL0100 00XB 1101 001w : mod 000 r/mmemory8 by CL0100 00XB 1101 0010 : mod 000 r/mmemory64 by CL0100 10XB 1101 0011 : mod 000 r/mregister by immediate count1100 000w : 11 000 reg : imm8byteregister by immediate count0100 000B 1100 0000 : 11 000 bytereg :imm8qwordregister by immediate count0100 100B 1100 0001 : 11 000 bytereg :imm8memory by immediate count1100 000w : mod 000 r/m : imm8memory8 by immediate count0100 00XB 1100 0000 : mod 000 r/m : imm8memory64 by immediate count0100 10XB 1100 0001 : mod 000 r/m : imm8B-42 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingROR – Rotate Rightregister by 10100 000B 1101 000w : 11 001 regbyteregister by 10100 000B 1101 0000 : 11 001 byteregqwordregister by 10100 100B 1101 0001 : 11 001 qwordregmemory by 10100 00XB 1101 000w : mod 001 r/mmemory8 by 10100 00XB 1101 0000 : mod 001 r/mmemory64 by 10100 10XB 1101 0001 : mod 001 r/mregister by CL0100 000B 1101 001w : 11 001 regbyteregister by CL0100 000B 1101 0010 : 11 001 byteregqwordregister by CL0100 100B 1101 0011 : 11 001 qwordregmemory by CL0100 00XB 1101 001w : mod 001 r/mmemory8 by CL0100 00XB 1101 0010 : mod 001 r/mmemory64 by CL0100 10XB 1101 0011 : mod 001 r/mregister by immediate count0100 000B 1100 000w : 11 001 reg : imm8byteregister by immediate count0100 000B 1100 0000 : 11 001 reg : imm8qwordregister by immediate count0100 100B 1100 0001 : 11 001 qwordreg :imm8memory by immediate count0100 00XB 1100 000w : mod 001 r/m : imm8memory8 by immediate count0100 00XB 1100 0000 : mod 001 r/m : imm8memory64 by immediate count0100 10XB 1100 0001 : mod 001 r/m : imm8RSM – Resume from System ManagementMode0000 1111 : 1010 1010SAL – Shift Arithmetic Leftsame instruction as SHLSAR – Shift Arithmetic Rightregister by 10100 000B 1101 000w : 11 111 regbyteregister by 10100 000B 1101 0000 : 11 111 byteregqwordregister by 10100 100B 1101 0001 : 11 111 qwordregmemory by 10100 00XB 1101 000w : mod 111 r/mmemory8 by 10100 00XB 1101 0000 : mod 111 r/mmemory64 by 10100 10XB 1101 0001 : mod 111 r/mVol.
2B B-43INSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingregister by CL0100 000B 1101 001w : 11 111 regbyteregister by CL0100 000B 1101 0010 : 11 111 byteregqwordregister by CL0100 100B 1101 0011 : 11 111 qwordregmemory by CL0100 00XB 1101 001w : mod 111 r/mmemory8 by CL0100 00XB 1101 0010 : mod 111 r/mmemory64 by CL0100 10XB 1101 0011 : mod 111 r/mregister by immediate count0100 000B 1100 000w : 11 111 reg : imm8byteregister by immediate count0100 000B 1100 0000 : 11 111 bytereg :imm8qwordregister by immediate count0100 100B 1100 0001 : 11 111 qwordreg :imm8memory by immediate count0100 00XB 1100 000w : mod 111 r/m : imm8memory8 by immediate count0100 00XB 1100 0000 : mod 111 r/m : imm8memory64 by immediate count0100 10XB 1100 0001 : mod 111 r/m : imm8SBB – Integer Subtraction with Borrowregister1 to register20100 0R0B 0001 100w : 11 reg1 reg2byteregister1 to byteregister20100 0R0B 0001 1000 : 11 bytereg1bytereg2quadregister1 to quadregister20100 1R0B 0001 1001 : 11 quadreg1quadreg2register2 to register10100 0R0B 0001 101w : 11 reg1 reg2byteregister2 to byteregister10100 0R0B 0001 1010 : 11 reg1 bytereg2byteregister2 to byteregister10100 1R0B 0001 1011 : 11 reg1 bytereg2memory to register0100 0RXB 0001 101w : mod reg r/mmemory8 to byteregister0100 0RXB 0001 1010 : mod bytereg r/mmemory64 to byteregister0100 1RXB 0001 1011 : mod quadreg r/mregister to memory0100 0RXB 0001 100w : mod reg r/mbyteregister to memory80100 0RXB 0001 1000 : mod reg r/mquadregister to memory640100 1RXB 0001 1001 : mod reg r/mimmediate to register0100 000B 1000 00sw : 11 011 reg : immB-44 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingimmediate8 to byteregister0100 000B 1000 0000 : 11 011 bytereg :imm8immediate32 to qwordregister0100 100B 1000 0001 : 11 011 qwordreg :imm32immediate8 to qwordregister0100 100B 1000 0011 : 11 011 qwordreg :imm8immediate to AL, AX, or EAX0100 000B 0001 110w : immimmediate32 to RAL0100 1000 0001 1101 : imm32immediate to memory0100 00XB 1000 00sw : mod 011 r/m : immimmediate8 to memory80100 00XB 1000 0000 : mod 011 r/m : imm8immediate32 to memory640100 10XB 1000 0001 : mod 011 r/m : imm32immediate8 to memory640100 10XB 1000 0011 : mod 011 r/m : imm8SCAS/SCASB/SCASW/SCASD – Scan Stringscan string1010 111wscan string (compare AL with byte at RDI)0100 1000 1010 1110scan string (compare RAX with qword at RDI)0100 1000 1010 1111SETcc – Byte Set on Conditionregister0100 000B 0000 1111 : 1001 tttn : 11 000regregister0100 0000 0000 1111 : 1001 tttn : 11 000regmemory0100 00XB 0000 1111 : 1001 tttn : mod 000r/mmemory0100 0000 0000 1111 : 1001 tttn : mod 000r/mSGDT – Store Global Descriptor Table Register0000 1111 : 0000 0001 : modA 000 r/mSHL – Shift Leftregister by 10100 000B 1101 000w : 11 100 regbyteregister by 10100 000B 1101 0000 : 11 100 byteregqwordregister by 10100 100B 1101 0001 : 11 100 qwordregmemory by 10100 00XB 1101 000w : mod 100 r/mmemory8 by 10100 00XB 1101 0000 : mod 100 r/mVol.
2B B-45INSTRUCTION FORMATS AND ENCODINGSTable B-15. General Purpose Instruction Formats and Encodingsfor 64-Bit Mode (Contd.)Instruction and FormatEncodingmemory64 by 10100 10XB 1101 0001 : mod 100 r/mregister by CL0100 000B 1101 001w : 11 100 regbyteregister by CL0100 000B 1101 0010 : 11 100 byteregqwordregister by CL0100 100B 1101 0011 : 11 100 qwordregmemory by CL0100 00XB 1101 001w : mod 100 r/mmemory8 by CL0100 00XB 1101 0010 : mod 100 r/mmemory64 by CL0100 10XB 1101 0011 : mod 100 r/mregister by immediate count0100 000B 1100 000w : 11 100 reg : imm8byteregister by immediate count0100 000B 1100 0000 : 11 100 bytereg :imm8quadregister by immediate count0100 100B 1100 0001 : 11 100 quadreg :imm8memory by immediate count0100 00XB 1100 000w : mod 100 r/m : imm8memory8 by immediate count0100 00XB 1100 0000 : mod 100 r/m : imm8memory64 by immediate count0100 10XB 1100 0001 : mod 100 r/m : imm8SHLD – Double Precision Shift Leftregister by immediate count0100 0R0B 0000 1111 : 1010 0100 : 11 reg2reg1 : imm8qwordregister by immediate80100 1R0B 0000 1111 : 1010 0100 : 11qworddreg2 qwordreg1 : imm8memory by immediate count0100 0RXB 0000 1111 : 1010 0100 : mod regr/m : imm8memory64 by immediate80100 1RXB 0000 1111 : 1010 0100 : modqwordreg r/m : imm8register by CL0100 0R0B 0000 1111 : 1010 0101 : 11 reg2reg1quadregister by CL0100 1R0B 0000 1111 : 1010 0101 : 11quadreg2 quadreg1memory by CL0100 00XB 0000 1111 : 1010 0101 : mod regr/mmemory64 by CL0100 1RXB 0000 1111 : 1010 0101 : modquadreg r/mB-46 Vol.
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