Volume 3B System Programming Guide_ Part 2 (794104)
Текст из файла
Intel® 64 and IA-32 ArchitecturesSoftware Developer’s ManualVolume 3B:System Programming Guide, Part 2NOTE: The Intel® 64 and IA-32 Architectures Software Developer's Manualconsists of five volumes: Basic Architecture, Order Number 253665;Instruction Set Reference A-M, Order Number 253666; Instruction SetReference N-Z, Order Number 253667; System Programming Guide,Part 1, Order Number 253668; System Programming Guide, Part 2, OrderNumber 253669. Refer to all five volumes when evaluating your designneeds.Order Number: 253669-023USMay 2007INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE,EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT.
EXCEPT AS PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCHPRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIEDWARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIESRELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANYPATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL PRODUCTS ARE NOT INTENDEDFOR USE IN MEDICAL, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS.Intel may make changes to specifications and product descriptions at any time, without notice.Developers must not rely on the absence or characteristics of any features or instructions marked “reserved”or “undefined.” Improper use of reserved or undefined features or instructions may cause unpredictable behavior or failure in developer's software code when running on an Intel processor.
Intel reserves these features or instructions for future definition and shall have no responsibility whatsoever for conflicts orincompatibilities arising from their unauthorized use.The Intel® 64 architecture processors may contain design defects or errors known as errata. Current characterized errata are available on request.Hyper-Threading Technology requires a computer system with an Intel® processor supporting HyperThreading Technology and an HT Technology enabled chipset, BIOS and operating system.
Performance willvary depending on the specific hardware and software you use. For more information, see http://www.intel.com/technology/hyperthread/index.htm; including details on which processors support HT Technology.Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtualmachine monitor (VMM) and for some uses, certain platform software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software configurations. Intel® VirtualizationTechnology-enabled BIOS and VMM applications are currently in development.64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications enabled for Intel® 64 architecture.
Processors will not operate(including 32-bit operation) without an Intel® 64 architecture-enabled BIOS. Performance will vary depending on your hardware and software configurations. Consult with your system vendor for more information.Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capabilityand a supporting operating system. Check with your PC manufacturer on whether your system delivers Execute Disable Bit functionality.Intel, Pentium, Intel Xeon, Intel NetBurst, Intel Core Solo, Intel Core Duo, Intel Core 2 Duo, Intel Core 2Extreme, Intel Pentium D, Itanium, Intel SpeedStep, MMX, and VTune are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.*Other names and brands may be claimed as the property of others.Contact your local Intel sales office or your distributor to obtain the latest specifications and before placingyour product order.Copies of documents which have an ordering number and are referenced in this document, or other Intelliterature, may be obtained from:Intel CorporationP.O.
Box 5937Denver, CO 80217-9808or call 1-800-548-4725or visit Intel’s website at http://www.intel.comCopyright © 1997-2007 Intel Corporationii Vol. 3BCHAPTER 18DEBUGGING AND PERFORMANCE MONITORINGIntel 64 and IA-32 architectures provide debug facilities for use in debugging codeand monitoring performance. These facilities are valuable for debugging applicationsoftware, system software, and multitasking operating systems. Debug support isaccessed using debug registers (DB0 through DB7) and model-specific registers(MSRs):•Debug registers hold the addresses of memory and I/O locations called breakpoints.
Breakpoints are user-selected locations in a program, a data-storage areain memory, or specific I/O ports. They are set where a programmer or systemdesigner wishes to halt execution of a program and examine the state of theprocessor by invoking debugger software. A debug exception (#DB) is generatedwhen a memory or I/O access is made to a breakpoint address.•MSRs monitor branches, interrupts, and exceptions; they record addresses of thelast branch, interrupt or exception taken and the last branch taken before aninterrupt or exception.18.1OVERVIEW OF DEBUG SUPPORT FACILITIESThe following processor facilities support debugging and performance monitoring:•Debug exception (#DB) — Transfers program control to a debug procedure ortask when a debug event occurs.•Breakpoint exception (#BP) — Transfers program control to a debugprocedure or task when an INT 3 instruction is executed.•Breakpoint-address registers (DR0 through DR3) — Specifies theaddresses of up to 4 breakpoints.•Debug status register (DR6) — Reports the conditions that were in effectwhen a debug or breakpoint exception was generated.•Debug control register (DR7) — Specifies the forms of memory or I/O accessthat cause breakpoints to be generated.•T (trap) flag, TSS — Generates a debug exception (#DB) when an attempt ismade to switch to a task with the T flag set in its TSS.•RF (resume) flag, EFLAGS register — Suppresses multiple exceptions to thesame instruction.•TF (trap) flag, EFLAGS register — Generates a debug exception (#DB) afterevery execution of an instruction.•Breakpoint instruction (INT 3) — Generates a breakpoint exception (#BP)that transfers program control to the debugger procedure or task.
ThisVol. 3 18-1DEBUGGING AND PERFORMANCE MONITORINGinstruction is an alternative way to set code breakpoints. It is especially usefulwhen more than four breakpoints are desired, or when breakpoints are beingplaced in the source code.•Last branch recording facilities — Store branch records in the last branchrecord (LBR) stack MSRs for the most recent taken branches, interrupts, and/orexceptions in MSRs. A branch record consist of a branch-from and a branch-toinstruction address. Send branch records out on the system bus as branch tracemessages (BTMs).These facilities allow a debugger to be called as a separate task or as a procedure inthe context of the current program or task. The following conditions can be used toinvoke the debugger:•••••••••Task switch to a specific task.Execution of the breakpoint instruction.Execution of any instruction.Execution of an instruction at a specified address.Read or write of a byte, word, or doubleword at a specified memory address.Write to a byte, word, or doubleword at a specified memory address.Input of a byte, word, or doubleword at a specified I/O address.Output of a byte, word, or doubleword at a specified I/O address.Attempt to change the contents of a debug register.18.2DEBUG REGISTERSEight debug registers (see Figure 18-1) control the debug operation of the processor.These registers can be written to and read using the move to/from debug registerform of the MOV instruction.
A debug register may be the source or destinationoperand for one of these instructions.Debug registers are privileged resources; a MOV instruction that accesses theseregisters can only be executed in real-address mode, in SMM or in protected mode ata CPL of 0. An attempt to read or write the debug registers from any other privilegelevel generates a general-protection exception (#GP).The primary function of the debug registers is to set up and monitor from 1 to 4breakpoints, numbered 0 though 3.
For each breakpoint, the following informationcan be specified:•••The linear address where the breakpoint is to occur.•Whether the breakpoint is enabled.The length of the breakpoint location (1, 2, or 4 bytes).The operation that must be performed at the address for a debug exception to begenerated.18-2 Vol. 3DEBUGGING AND PERFORMANCE MONITORING•Whether the breakpoint condition was present when the debug exception wasgenerated.31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0LEN R/W LEN R/W LEN R/W LEN R/W 0 0 G 0 0 1 G L G L G L G L G LDR733221100DE E 3 3 2 2 1 1 0 03116 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0Reserved (set to 1)B B B 0 1 1 1 1 1 1 1 1 1 B B B BDR6T S D3 2 1 0310DR5310DR4310DR3Breakpoint 3 Linear Address310DR2Breakpoint 2 Linear Address310DR1Breakpoint 1 Linear Address310Breakpoint 0 Linear AddressDR0ReservedFigure 18-1.
Debug RegistersThe following paragraphs describe the functions of flags and fields in the debugregisters.Vol. 3 18-3DEBUGGING AND PERFORMANCE MONITORING18.2.1Debug Address Registers (DR0-DR3)Each of the debug-address registers (DR0 through DR3) holds the 32-bit linearaddress of a breakpoint (see Figure 18-1). Breakpoint comparisons are made beforephysical address translation occurs. The contents of debug register DR7 further specifies breakpoint conditions.18.2.2Debug Registers DR4 and DR5Debug registers DR4 and DR5 are reserved when debug extensions are enabled(when the DE flag in control register CR4 is set) and attempts to reference the DR4and DR5 registers cause invalid-opcode exceptions (#UD).
Характеристики
Тип файла PDF
PDF-формат наиболее широко используется для просмотра любого типа файлов на любом устройстве. В него можно сохранить документ, таблицы, презентацию, текст, чертежи, вычисления, графики и всё остальное, что можно показать на экране любого устройства. Именно его лучше всего использовать для печати.
Например, если Вам нужно распечатать чертёж из автокада, Вы сохраните чертёж на флешку, но будет ли автокад в пункте печати? А если будет, то нужная версия с нужными библиотеками? Именно для этого и нужен формат PDF - в нём точно будет показано верно вне зависимости от того, в какой программе создали PDF-файл и есть ли нужная программа для его просмотра.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
