Volume 2B Instruction Set Reference N-Z (794102), страница 74
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2BINSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and FormatEncodingCVTPI2PS—Convert Packed DoublewordIntegers to Packed Single-PrecisionFloating-Point Valuesmmreg to xmmreg0000 1111:0010 1010:11 xmmreg1 mmreg1mem to xmmreg0000 1111:0010 1010: mod xmmreg r/mCVTPS2PI—Convert Packed SinglePrecision Floating-Point Values toPacked Doubleword Integersxmmreg to mmreg0000 1111:0010 1101:11 mmreg1 xmmreg1mem to mmreg0000 1111:0010 1101: mod mmreg r/mCVTSI2SS—Convert Doubleword Integerto Scalar Single-Precision Floating-PointValuer32 to xmmreg11111 0011:0000 1111:00101010:11 xmmreg r32mem to xmmreg1111 0011:0000 1111:00101010: mod xmmreg r/mCVTSS2SI—Convert Scalar SinglePrecision Floating-Point Value toDoubleword Integerxmmreg to r321111 0011:0000 1111:0010 1101:11 r32 xmmregmem to r321111 0011:0000 1111:0010 1101: mod r32 r/mCVTTPS2PI—Convert with TruncationPacked Single-Precision Floating-PointValues to Packed Doubleword Integersxmmreg to mmreg0000 1111:0010 1100:11 mmreg1 xmmreg1mem to mmreg0000 1111:0010 1100: mod mmreg r/mCVTTSS2SI—Convert with TruncationScalar Single-Precision Floating-PointValue to Doubleword Integerxmmreg to r321111 0011:0000 1111:0010 1100:11 r32 xmmreg1mem to r321111 0011:0000 1111:0010 1100: mod r32 r/mDIVPS—Divide Packed Single-PrecisionFloating-Point Valuesxmmreg to xmmreg0000 1111:0101 1110:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1110: mod xmmreg r/mDIVSS—Divide Scalar Single-PrecisionFloating-Point ValuesVol.
2B B-61INSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and FormatEncodingxmmreg to xmmreg1111 0011:0000 1111:0101 1110:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1110: mod xmmregr/mLDMXCSR—Load MXCSR Register Statem32 to MXCSR0000 1111:1010 1110:modA 010 memMAXPS—Return Maximum PackedSingle-Precision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 1111:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1111: mod xmmreg r/mMAXSS—Return Maximum ScalarDouble-Precision Floating-Point Valuexmmreg to xmmreg1111 0011:0000 1111:0101 1111:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1111: mod xmmregr/mMINPS—Return Minimum PackedDouble-Precision Floating-PointValuesxmmreg to xmmreg0000 1111:0101 1101:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1101: mod xmmreg r/mMINSS—Return Minimum Scalar DoublePrecision Floating-Point Valuexmmreg to xmmreg1111 0011:0000 1111:0101 1101:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1101: mod xmmregr/mMOVAPS—Move Aligned PackedSingle-Precision Floating-Point Valuesxmmreg2 to xmmreg10000 1111:0010 1000:11 xmmreg2 xmmreg1mem to xmmreg10000 1111:0010 1000: mod xmmreg r/mxmmreg1 to xmmreg20000 1111:0010 1001:11 xmmreg1 xmmreg2xmmreg1 to mem0000 1111:0010 1001: mod xmmreg r/mB-62 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and FormatEncodingMOVHLPS—Move Packed SinglePrecision Floating-Point Values High toLowxmmreg to xmmreg0000 1111:0001 0010:11 xmmreg1 xmmreg2MOVHPS—Move High Packed SinglePrecision Floating-Point Valuesmem to xmmreg0000 1111:0001 0110: mod xmmreg r/mxmmreg to mem0000 1111:0001 0111: mod xmmreg r/mMOVLHPS—Move Packed SinglePrecision Floating-Point Values Low toHighxmmreg to xmmreg0000 1111:00010110:11 xmmreg1 xmmreg2MOVLPS—Move Low Packed SinglePrecision Floating-Point Valuesmem to xmmreg0000 1111:0001 0010: mod xmmreg r/mxmmreg to mem0000 1111:0001 0011: mod xmmreg r/mMOVMSKPS—Extract Packed SinglePrecision Floating-Point Sign Maskxmmreg to r320000 1111:0101 0000:11 r32 xmmregMOVSS—Move Scalar Single-PrecisionFloating-Point Valuesxmmreg2 to xmmreg11111 0011:0000 1111:0001 0000:11 xmmreg2xmmreg1mem to xmmreg11111 0011:0000 1111:0001 0000: mod xmmregr/mxmmreg1 to xmmreg21111 0011:0000 1111:0001 0001:11 xmmreg1xmmreg2xmmreg1 to mem1111 0011:0000 1111:0001 0001: mod xmmregr/mMOVUPS—Move Unaligned PackedSingle-Precision Floating-Point Valuesxmmreg2 to xmmreg10000 1111:0001 0000:11 xmmreg2 xmmreg1mem to xmmreg10000 1111:0001 0000: mod xmmreg r/mxmmreg1 to xmmreg20000 1111:0001 0001:11 xmmreg1 xmmreg2xmmreg1 to mem0000 1111:0001 0001: mod xmmreg r/mVol.
2B B-63INSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and FormatEncodingMULPS—Multiply Packed SinglePrecision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 1001:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1001: mod xmmreg rmMULSS—Multiply Scalar Single-PrecisionFloating-Point Valuesxmmreg to xmmreg1111 0011:0000 1111:0101 1001:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1001: mod xmmregr/mORPS—Bitwise Logical OR of SinglePrecision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 0110:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 0110 mod xmmreg r/mRCPPS—Compute Reciprocals of PackedSingle-Precision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 0011:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 0011: mod xmmreg r/mRCPSS—Compute Reciprocals of ScalarSingle-Precision Floating-Point Valuexmmreg to xmmreg1111 0011:0000 1111:01010011:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:01010011: mod xmmreg r/mRSQRTPS—Compute Reciprocals ofSquare Roots of Packed SinglePrecision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 0010:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 0010 mode xmmreg r/mRSQRTSS—Compute Reciprocals ofSquare Roots of Scalar Single-PrecisionFloating-Point Valuexmmreg to xmmreg1111 0011:0000 1111:0101 0010:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 0010 mod xmmreg r/mSHUFPS—Shuffle Packed SinglePrecision Floating-Point ValuesB-64 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and FormatEncodingxmmreg to xmmreg, imm80000 1111:1100 0110:11 xmmreg1 xmmreg2:imm8mem to xmmreg, imm80000 1111:1100 0110: mod xmmreg r/m: imm8SQRTPS—Compute Square Roots ofPacked Single-Precision Floating-PointValuesxmmreg to xmmreg0000 1111:0101 0001:11 xmmreg1 xmmreg 2mem to xmmreg0000 1111:0101 0001 mod xmmreg r/mSQRTSS—Compute Square Root ofScalar Single-Precision Floating-PointValuexmmreg to xmmreg1111 0011:0000 1111:0101 0001:11 xmmreg1xmmreg 2mem to xmmreg1111 0011:0000 1111:0101 0001:mod xmmreg r/mSTMXCSR—Store MXCSR Register StateMXCSR to mem0000 1111:1010 1110:modA 011 memSUBPS—Subtract Packed SinglePrecision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 1100:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 1100:mod xmmreg r/mSUBSS—Subtract Scalar SinglePrecision Floating-Point Valuesxmmreg to xmmreg1111 0011:0000 1111:0101 1100:11 xmmreg1xmmreg2mem to xmmreg1111 0011:0000 1111:0101 1100:mod xmmreg r/mUCOMISS—Unordered Compare ScalarOrdered Single-Precision Floating-PointValues and Set EFLAGSxmmreg to xmmreg0000 1111:0010 1110:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0010 1110 mod xmmreg r/mUNPCKHPS—Unpack and InterleaveHigh Packed Single-Precision FloatingPoint Valuesxmmreg to xmmreg0000 1111:0001 0101:11 xmmreg1 xmmreg2Vol.
2B B-65INSTRUCTION FORMATS AND ENCODINGSTable B-21. Formats and Encodings of SSE Floating-Point Instructions (Contd.)Instruction and Formatmem to xmmregEncoding0000 1111:0001 0101 mod xmmreg r/mUNPCKLPS—Unpack and Interleave LowPacked Single-Precision Floating-PointValuesxmmreg to xmmreg0000 1111:0001 0100:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0001 0100 mod xmmreg r/mXORPS—Bitwise Logical XOR of SinglePrecision Floating-Point Valuesxmmreg to xmmreg0000 1111:0101 0111:11 xmmreg1 xmmreg2mem to xmmreg0000 1111:0101 0111 mod xmmreg r/mTable B-22. Formats and Encodings of SSE Integer InstructionsInstruction and FormatEncodingPAVGB/PAVGW—Average Packed Integersmmreg to mmreg0000 1111:1110 0000:11 mmreg1 mmreg20000 1111:1110 0011:11 mmreg1 mmreg2mem to mmreg0000 1111:1110 0000 mod mmreg r/m0000 1111:1110 0011 mod mmreg r/mPEXTRW—Extract Wordmmreg to reg32, imm80000 1111:1100 0101:11 r32 mmreg: imm8PINSRW—Insert Wordreg32 to mmreg, imm80000 1111:1100 0100:11 mmreg r32: imm8m16 to mmreg, imm80000 1111:1100 0100 mod mmreg r/m:imm8PMAXSW—Maximum of Packed Signed WordIntegersmmreg to mmreg0000 1111:1110 1110:11 mmreg1 mmreg2mem to mmreg0000 1111:1110 1110 mod mmreg r/mPMAXUB—Maximum of Packed Unsigned ByteIntegersmmreg to mmreg0000 1111:1101 1110:11 mmreg1 mmreg2mem to mmreg0000 1111:1101 1110 mod mmreg r/mB-66 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-22. Formats and Encodings of SSE Integer Instructions (Contd.)Instruction and FormatEncodingPMINSW—Minimum of Packed Signed WordIntegersmmreg to mmreg0000 1111:1110 1010:11 mmreg1 mmreg2mem to mmreg0000 1111:1110 1010 mod mmreg r/mPMINUB—Minimum of Packed Unsigned ByteIntegersmmreg to mmreg0000 1111:1101 1010:11 mmreg1 mmreg2mem to mmreg0000 1111:1101 1010 mod mmreg r/mPMOVMSKB—Move Byte Mask To Integermmreg to reg320000 1111:1101 0111:11 r32 mmregPMULHUW—Multiply Packed Unsigned Integersand Store High Resultmmreg to mmreg0000 1111:1110 0100:11 mmreg1 mmreg2mem to mmreg0000 1111:1110 0100 mod mmreg r/mPSADBW—Compute Sum of AbsoluteDifferencesmmreg to mmreg0000 1111:1111 0110:11 mmreg1 mmreg2mem to mmreg0000 1111:1111 0110 mod mmreg r/mPSHUFW—Shuffle Packed Wordsmmreg to mmreg, imm80000 1111:0111 0000:11 mmreg1 mmreg2:imm8mem to mmreg, imm80000 1111:0111 0000:11 mod mmreg r/m:imm8Table B-23.
Format and Encoding of SSE Cacheability & Memory OrderingInstructionsInstruction and FormatEncodingMASKMOVQ—Store Selected Bytes of Quadwordmmreg to mmreg0000 1111:1111 0111:11 mmreg1mmreg2MOVNTPS—Store Packed Single-Precision FloatingPoint Values Using Non-Temporal Hintxmmreg to mem0000 1111:0010 1011: mod xmmregr/mVol.
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