Volume 2B Instruction Set Reference N-Z (794102), страница 77
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2BINSTRUCTION FORMATS AND ENCODINGSTable B-26. Formats and Encodings of SSE2 Integer Instructions (Contd.)Instruction and Formatxmmxreg by immediateEncoding0110 0110:0000 1111:0111 00gg: 11 010 xmmreg:imm8PSUBQ—Subtract Packed QuadwordIntegersmmreg to mmreg0000 1111:11111 011:11 mmreg1 mmreg2mem to mmreg0000 1111:1111 1011: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:1111 1011:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:1111 1011: mod xmmreg r/mPSUB—Subtract With Wrap-aroundxmmreg2 from xmmreg10110 0110:0000 1111:1111 10gg: 11 xmmreg1xmmreg2memory from xmmreg0110 0110:0000 1111:1111 10gg: mod xmmreg r/mPSUBS—Subtract Signed WithSaturationxmmreg2 from xmmreg10110 0110:0000 1111:1110 10gg: 11 xmmreg1xmmreg2memory from xmmreg0110 0110:0000 1111:1110 10gg: mod xmmreg r/mPSUBUS—Subtract Unsigned WithSaturationxmmreg2 from xmmreg10000 1111:1101 10gg: 11 xmmreg1 xmmreg2memory from xmmreg0000 1111:1101 10gg: mod xmmreg r/mPUNPCKH—Unpack High Data ToNext Larger Typexmmreg to xmmreg0110 0110:0000 1111:0110 10gg:11 xmmreg1Xmmreg2mem to xmmreg0110 0110:0000 1111:0110 10gg: mod xmmreg r/mPUNPCKHQDQ—Unpack High Dataxmmreg to xmmreg0110 0110:0000 1111:0110 1101:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0110 1101: mod xmmreg r/mPUNPCKL—Unpack Low Data To NextLarger Typexmmreg to xmmreg0110 0110:0000 1111:0110 00gg:11 xmmreg1xmmreg2Vol.
2B B-83INSTRUCTION FORMATS AND ENCODINGSTable B-26. Formats and Encodings of SSE2 Integer Instructions (Contd.)Instruction and Formatmem to xmmregEncoding0110 0110:0000 1111:0110 00gg: mod xmmreg r/mPUNPCKLQDQ—Unpack Low Dataxmmreg to xmmreg0110 0110:0000 1111:0110 1100:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0110 1100: mod xmmreg r/mPXOR—Bitwise Xorxmmreg2 to xmmreg10110 0110:0000 1111:1110 1111: 11 xmmreg1xmmreg2memory to xmmreg0110 0110:0000 1111:1110 1111: mod xmmreg r/mTable B-27.
Format and Encoding of SSE2 Cacheability InstructionsInstruction and FormatEncodingMASKMOVDQU—Store Selected Bytesof Double Quadwordxmmreg to xmmreg0110 0110:0000 1111:1111 0111:11 xmmreg1xmmreg2CLFLUSH—Flush Cache Linemem0000 1111:1010 1110:mod r/mMOVNTPD—Store Packed DoublePrecision Floating-Point Values UsingNon-Temporal Hintxmmreg to mem0110 0110:0000 1111:0010 1011: mod xmmreg r/mMOVNTDQ—Store Double QuadwordUsing Non-Temporal Hintxmmreg to mem0110 0110:0000 1111:1110 0111: mod xmmreg r/mMOVNTI—Store Doubleword UsingNon-Temporal Hintreg to mem0000 1111:1100 0011: mod reg r/mPAUSE—Spin Loop Hint1111 0011:1001 0000LFENCE—Load Fence0000 1111:1010 1110: 11 101 000MFENCE—Memory Fence0000 1111:1010 1110: 11 110 000B-84 Vol. 2BINSTRUCTION FORMATS AND ENCODINGSB.9SSE3 FORMATS AND ENCODINGS TABLEThe tables in this section provide SSE3 formats and encodings. Some SSE3 instructions require a mandatory prefix (66H, F2H, F3H) as part of the two-byte opcode.These prefixes are included in the tables.When in IA-32e mode, use of the REX.R prefix permits instructions that use generalpurpose and XMM registers to access additional registers.
Some instructions requirethe REX.W prefix to promote the instruction to 64-bit operation. Instructions thatrequire the REX.W prefix are listed (with their opcodes) in Section B.11.Table B-28. Formats and Encodings of SSE3 Floating-Point InstructionsInstruction and FormatEncodingADDSUBPD—Add /Sub packed DP FPnumbers from XMM2/Mem to XMM1xmmreg2 to xmmreg101100110:00001111:11010000:11 xmmreg1xmmreg2mem to xmmreg01100110:00001111:11010000: mod xmmregr/mADDSUBPS—Add /Sub packed SP FPnumbers from XMM2/Mem to XMM1xmmreg2 to xmmreg111110010:00001111:11010000:11 xmmreg1xmmreg2mem to xmmreg11110010:00001111:11010000: mod xmmregr/mHADDPD—Add horizontally packed DP FPnumbers XMM2/Mem to XMM1xmmreg2 to xmmreg101100110:00001111:01111100:11 xmmreg1xmmreg2mem to xmmreg01100110:00001111:01111100: mod xmmregr/mHADDPS—Add horizontally packed SP FPnumbers XMM2/Mem to XMM1xmmreg2 to xmmreg111110010:00001111:01111100:11 xmmreg1xmmreg2mem to xmmreg11110010:00001111:01111100: mod xmmregr/mHSUBPD—Sub horizontally packed DP FPnumbers XMM2/Mem to XMM1xmmreg2 to xmmreg101100110:00001111:01111101:11 xmmreg1xmmreg2Vol.
2B B-85INSTRUCTION FORMATS AND ENCODINGSTable B-28. Formats and Encodings of SSE3 Floating-Point Instructions (Contd.)Instruction and Formatmem to xmmregEncoding01100110:00001111:01111101: mod xmmregr/mHSUBPS—Sub horizontally packed SP FPnumbers XMM2/Mem to XMM1xmmreg2 to xmmreg111110010:00001111:01111101:11 xmmreg1xmmreg2mem to xmmreg11110010:00001111:01111101: mod xmmregr/mTable B-29. Formats and Encodings for SSE3 Event Management InstructionsInstruction and FormatEncodingMONITOR—Set up a linear address range tobe monitored by hardwareeax, ecx, edx0000 1111 : 0000 0001:11 001 000MWAIT—Wait until write-back storeperformed within the range specified bythe instruction MONITOReax, ecx0000 1111 : 0000 0001:11 001 001Table B-30.
Formats and Encodings for SSE3 Integer and Move InstructionsInstruction and FormatEncodingFISTTP—Store ST in int16 (chop) and popm16int11011 111 : modA 001 r/mFISTTP—Store ST in int32 (chop) and popm32int11011 011 : modA 001 r/mFISTTP—Store ST in int64 (chop) and popm64int11011 101 : modA 001 r/mLDDQU—Load unaligned integer 128-bitxmm, m12811110010:00001111:11110000: modA xmmregr/mMOVDDUP—Move 64 bits representing oneDP data from XMM2/Mem to XMM1 andduplicatexmmreg2 to xmmreg1B-86 Vol. 2B11110010:00001111:00010010:11 xmmreg1xmmreg2INSTRUCTION FORMATS AND ENCODINGSTable B-30. Formats and Encodings for SSE3 Integer and Move Instructions (Contd.)Instruction and Formatmem to xmmregEncoding11110010:00001111:00010010: mod xmmregr/mMOVSHDUP—Move 128 bits representing 4SP data from XMM2/Mem to XMM1 andduplicate highxmmreg2 to xmmreg111110011:00001111:00010110:11 xmmreg1xmmreg2mem to xmmreg11110011:00001111:00010110: mod xmmregr/mMOVSLDUP—Move 128 bits representing 4SP data from XMM2/Mem to XMM1 andduplicate lowxmmreg2 to xmmreg111110011:00001111:00010010:11 xmmreg1xmmreg2mem to xmmreg11110011:00001111:00010010: mod xmmregr/mB.10SSSE3 FORMATS AND ENCODING TABLEThe tables in this section provide SSSE3 formats and encodings.
Some SSSE3instructions require a mandatory prefix (66H) as part of the three-byte opcode.These prefixes are included in the table below.Table B-31. Formats and Encodings for SSSE3 InstructionsInstruction and FormatEncodingPABSB—Packed AbsoluteValue Bytesmmreg to mmreg0000 1111:0011 1000: 0001 1100:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0001 1100: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0001 1100:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0001 1100: mod xmmreg r/mPABSD—Packed AbsoluteValue Double Wordsmmreg to mmreg0000 1111:0011 1000: 0001 1110:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0001 1110: mod mmreg r/mVol.
2B B-87INSTRUCTION FORMATS AND ENCODINGSTable B-31. Formats and Encodings for SSSE3 Instructions (Contd.)Instruction and FormatEncodingxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0001 1110:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0001 1110: mod xmmreg r/mPABSW—PackedAbsolute Value Wordsmmreg to mmreg0000 1111:0011 1000: 0001 1101:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0001 1101: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0001 1101:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0001 1101: mod xmmreg r/mPALIGNR—Packed AlignRightmmreg to mmreg0000 1111:0011 1010: 0000 1111:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1010: 0000 1111: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1010: 0000 1111:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1010: 0000 1111: mod xmmreg r/mPHADDD—PackedHorizontal Add DoubleWordsmmreg to mmreg0000 1111:0011 1000: 0000 0010:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0010: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0010:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0010: mod xmmreg r/mPHADDSW—PackedHorizontal Add andSaturatemmreg to mmreg0000 1111:0011 1000: 0000 0011:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0011: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0011:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0011: mod xmmreg r/mB-88 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-31. Formats and Encodings for SSSE3 Instructions (Contd.)Instruction and FormatEncodingPHADDW—PackedHorizontal Add Wordsmmreg to mmreg0000 1111:0011 1000: 0000 0001:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0001: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0001:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0001: mod xmmreg r/mPHSUBD—PackedHorizontal SubtractDouble Wordsmmreg to mmreg0000 1111:0011 1000: 0000 0110:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0110: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0110:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0110: mod xmmreg r/mPHSUBSW—PackedHorizontal Subtract andSaturatemmreg to mmreg0000 1111:0011 1000: 0000 0111:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0111: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0111:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0111: mod xmmreg r/mPHSUBW—PackedHorizontal SubtractWordsmmreg to mmreg0000 1111:0011 1000: 0000 0101:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0101: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0101:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0101: mod xmmreg r/mPMADDUBSW—Multiplyand Add Packed Signedand Unsigned Bytesmmreg to mmreg0000 1111:0011 1000: 0000 0100:11 mmreg1 mmreg2Vol.
2B B-89INSTRUCTION FORMATS AND ENCODINGSTable B-31. Formats and Encodings for SSSE3 Instructions (Contd.)Instruction and FormatEncodingmem to mmreg0000 1111:0011 1000: 0000 0100: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0100:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0100: mod xmmreg r/mPMULHRSW—PackedMultiply HIgn with Roundand Scalemmreg to mmreg0000 1111:0011 1000: 0000 1011:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 1011: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 1011:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 1011: mod xmmreg r/mPSHUFB—Packed ShuffleBytesmmreg to mmreg0000 1111:0011 1000: 0000 0000:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 0000: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 0000:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 0000: mod xmmreg r/mPSIGNB—Packed SignBytesmmreg to mmreg0000 1111:0011 1000: 0000 1000:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 1000: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 1000:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 1000: mod xmmreg r/mPSIGND—Packed SignDouble Wordsmmreg to mmreg0000 1111:0011 1000: 0000 1010:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 1010: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 1010:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 1010: mod xmmreg r/mB-90 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-31. Formats and Encodings for SSSE3 Instructions (Contd.)Instruction and FormatEncodingPSIGNW—Packed SignWordsmmreg to mmreg0000 1111:0011 1000: 0000 1001:11 mmreg1 mmreg2mem to mmreg0000 1111:0011 1000: 0000 1001: mod mmreg r/mxmmreg to xmmreg0110 0110:0000 1111:0011 1000: 0000 1001:11 xmmreg1xmmreg2mem to xmmreg0110 0110:0000 1111:0011 1000: 0000 1001: mod xmmreg r/mB.11SPECIAL ENCODINGS FOR 64-BIT MODEThe following Pentium, P6, MMX, SSE, SSE2, SSE3 instructions are promoted to64-bit operation in IA-32e mode by using REX.W.
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