Volume 2B Instruction Set Reference N-Z (794102), страница 68
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2B B-15INSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingDR6-DR7 from register0000 1111 : 0010 0011 : 11 eee regregister from DR6-DR70000 1111 : 0010 0001 : 11 eee regregister from DR4-DR50000 1111 : 0010 0001 : 11 eee regregister from DR0-DR30000 1111 : 0010 0001 : 11 eee regMOV – Move to/from Segment Registersregister to segment register1000 1110 : 11 sreg3 regregister to SS1000 1110 : 11 sreg3 regmemory to segment reg1000 1110 : mod sreg3 r/mmemory to SS1000 1110 : mod sreg3 r/msegment register to register1000 1100 : 11 sreg3 regsegment register to memory1000 1100 : mod sreg3 r/mMOVS/MOVSB/MOVSW/MOVSD – Move Datafrom String to String1010 010wMOVSX – Move with Sign-Extendregister2 to register10000 1111 : 1011 111w : 11 reg1 reg2memory to reg0000 1111 : 1011 111w : mod reg r/mMOVZX – Move with Zero-Extendregister2 to register10000 1111 : 1011 011w : 11 reg1 reg2memory to register0000 1111 : 1011 011w : mod reg r/mMUL – Unsigned MultiplyAL, AX, or EAX with register1111 011w : 11 100 regAL, AX, or EAX with memory1111 011w : mod 100 regNEG – Two's Complement Negationregister1111 011w : 11 011 regmemory1111 011w : mod 011 r/mNOP – No Operation1001 0000NOP – Multi-byte No Operation1register0000 1111 0001 1111 : 11 000 regmemory0000 1111 0001 1111 : mod 000 r/mNOT – One's Complement NegationB-16 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingregister1111 011w : 11 010 regmemory1111 011w : mod 010 r/mOR – Logical Inclusive ORregister1 to register20000 100w : 11 reg1 reg2register2 to register10000 101w : 11 reg1 reg2memory to register0000 101w : mod reg r/mregister to memory0000 100w : mod reg r/mimmediate to register1000 00sw : 11 001 reg : immediate dataimmediate to AL, AX, or EAX0000 110w : immediate dataimmediate to memory1000 00sw : mod 001 r/m : immediate dataOUT – Output to Portfixed port1110 011w : port numbervariable port1110 111wOUTS – Output to DX Port0110 111wPOP – Pop a Word from the Stackregister1000 1111 : 11 000 regregister (alternate encoding)0101 1 regmemory1000 1111 : mod 000 r/mPOP – Pop a Segment Register from the Stack(Note: CS cannot be sreg2 in this usage.)segment register DS, ES000 sreg2 111segment register SS000 sreg2 111segment register FS, GS0000 1111: 10 sreg3 001POPA/POPAD – Pop All General Registers0110 0001POPF/POPFD – Pop Stack into FLAGS orEFLAGS Register1001 1101PUSH – Push Operand onto the Stackregister1111 1111 : 11 110 regregister (alternate encoding)0101 0 regmemory1111 1111 : mod 110 r/mVol.
2B B-17INSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatimmediateEncoding0110 10s0 : immediate dataPUSH – Push Segment Register onto theStacksegment register CS,DS,ES,SS000 sreg2 110segment register FS,GS0000 1111: 10 sreg3 000PUSHA/PUSHAD – Push All General Registers0110 0000PUSHF/PUSHFD – Push Flags Register ontothe Stack1001 1100RCL – Rotate thru Carry Leftregister by 11101 000w : 11 010 regmemory by 11101 000w : mod 010 r/mregister by CL1101 001w : 11 010 regmemory by CL1101 001w : mod 010 r/mregister by immediate count1100 000w : 11 010 reg : imm8 datamemory by immediate count1100 000w : mod 010 r/m : imm8 dataRCR – Rotate thru Carry Rightregister by 11101 000w : 11 011 regmemory by 11101 000w : mod 011 r/mregister by CL1101 001w : 11 011 regmemory by CL1101 001w : mod 011 r/mregister by immediate count1100 000w : 11 011 reg : imm8 datamemory by immediate count1100 000w : mod 011 r/m : imm8 dataRDMSR – Read from Model-Specific Register0000 1111 : 0011 0010RDPMC – Read Performance MonitoringCounters0000 1111 : 0011 0011RDTSC – Read Time-Stamp Counter0000 1111 : 0011 0001REP INS – Input String1111 0011 : 0110 110wREP LODS – Load String1111 0011 : 1010 110wREP MOVS – Move String1111 0011 : 1010 010wB-18 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingREP OUTS – Output String1111 0011 : 0110 111wREP STOS – Store String1111 0011 : 1010 101wREPE CMPS – Compare String1111 0011 : 1010 011wREPE SCAS – Scan String1111 0011 : 1010 111wREPNE CMPS – Compare String1111 0010 : 1010 011wREPNE SCAS – Scan String1111 0010 : 1010 111wRET – Return from Procedure (to samesegment)no argument1100 0011adding immediate to SP1100 0010 : 16-bit displacementRET – Return from Procedure (to othersegment)intersegment1100 1011adding immediate to SP1100 1010 : 16-bit displacementROL – Rotate Leftregister by 11101 000w : 11 000 regmemory by 11101 000w : mod 000 r/mregister by CL1101 001w : 11 000 regmemory by CL1101 001w : mod 000 r/mregister by immediate count1100 000w : 11 000 reg : imm8 datamemory by immediate count1100 000w : mod 000 r/m : imm8 dataROR – Rotate Rightregister by 11101 000w : 11 001 regmemory by 11101 000w : mod 001 r/mregister by CL1101 001w : 11 001 regmemory by CL1101 001w : mod 001 r/mregister by immediate count1100 000w : 11 001 reg : imm8 datamemory by immediate count1100 000w : mod 001 r/m : imm8 dataRSM – Resume from System ManagementMode0000 1111 : 1010 1010SAHF – Store AH into Flags1001 1110Vol.
2B B-19INSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatSAL – Shift Arithmetic LeftEncodingsame instruction as SHLSAR – Shift Arithmetic Rightregister by 11101 000w : 11 111 regmemory by 11101 000w : mod 111 r/mregister by CL1101 001w : 11 111 regmemory by CL1101 001w : mod 111 r/mregister by immediate count1100 000w : 11 111 reg : imm8 datamemory by immediate count1100 000w : mod 111 r/m : imm8 dataSBB – Integer Subtraction with Borrowregister1 to register20001 100w : 11 reg1 reg2register2 to register10001 101w : 11 reg1 reg2memory to register0001 101w : mod reg r/mregister to memory0001 100w : mod reg r/mimmediate to register1000 00sw : 11 011 reg : immediate dataimmediate to AL, AX, or EAX0001 110w : immediate dataimmediate to memory1000 00sw : mod 011 r/m : immediate dataSCAS/SCASB/SCASW/SCASD – Scan String1010 111wSETcc – Byte Set on ConditionregistermemorySGDT – Store Global Descriptor Table Register0000 1111 : 1001 tttn : 11 000 reg0000 1111 : 1001 tttn : mod 000 r/m0000 1111 : 0000 0001 : modA 000 r/mSHL – Shift Leftregister by 11101 000w : 11 100 regmemory by 11101 000w : mod 100 r/mregister by CL1101 001w : 11 100 regmemory by CL1101 001w : mod 100 r/mregister by immediate count1100 000w : 11 100 reg : imm8 datamemory by immediate count1100 000w : mod 100 r/m : imm8 dataSHLD – Double Precision Shift LeftB-20 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingregister by immediate count0000 1111 : 1010 0100 : 11 reg2 reg1 : imm8memory by immediate count0000 1111 : 1010 0100 : mod reg r/m : imm8register by CL0000 1111 : 1010 0101 : 11 reg2 reg1memory by CL0000 1111 : 1010 0101 : mod reg r/mSHR – Shift Rightregister by 11101 000w : 11 101 regmemory by 11101 000w : mod 101 r/mregister by CL1101 001w : 11 101 regmemory by CL1101 001w : mod 101 r/mregister by immediate count1100 000w : 11 101 reg : imm8 datamemory by immediate count1100 000w : mod 101 r/m : imm8 dataSHRD – Double Precision Shift Rightregister by immediate count0000 1111 : 1010 1100 : 11 reg2 reg1 : imm8memory by immediate count0000 1111 : 1010 1100 : mod reg r/m : imm8register by CL0000 1111 : 1010 1101 : 11 reg2 reg1memory by CL0000 1111 : 1010 1101 : mod reg r/mSIDT – Store Interrupt Descriptor TableRegister0000 1111 : 0000 0001 : modA 001 r/mSLDT – Store Local Descriptor Table Registerto register0000 1111 : 0000 0000 : 11 000 regto memory0000 1111 : 0000 0000 : mod 000 r/mSMSW – Store Machine Status Wordto register0000 1111 : 0000 0001 : 11 100 regto memory0000 1111 : 0000 0001 : mod 100 r/mSTC – Set Carry Flag1111 1001STD – Set Direction Flag1111 1101STI – Set Interrupt Flag1111 1011STOS/STOSB/STOSW/STOSD – Store StringData1010 101wSTR – Store Task RegisterVol.
2B B-21INSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingto register0000 1111 : 0000 0000 : 11 001 regto memory0000 1111 : 0000 0000 : mod 001 r/mSUB – Integer Subtractionregister1 to register20010 100w : 11 reg1 reg2register2 to register10010 101w : 11 reg1 reg2memory to register0010 101w : mod reg r/mregister to memory0010 100w : mod reg r/mimmediate to register1000 00sw : 11 101 reg : immediate dataimmediate to AL, AX, or EAX0010 110w : immediate dataimmediate to memory1000 00sw : mod 101 r/m : immediate dataTEST – Logical Compareregister1 and register21000 010w : 11 reg1 reg2memory and register1000 010w : mod reg r/mimmediate and register1111 011w : 11 000 reg : immediate dataimmediate and AL, AX, or EAX1010 100w : immediate dataimmediate and memory1111 011w : mod 000 r/m : immediate dataUD2 – Undefined instruction0000 FFFF : 0000 1011VERR – Verify a Segment for Readingregister0000 1111 : 0000 0000 : 11 100 regmemory0000 1111 : 0000 0000 : mod 100 r/mVERW – Verify a Segment for Writingregister0000 1111 : 0000 0000 : 11 101 regmemory0000 1111 : 0000 0000 : mod 101 r/mWAIT – Wait1001 1011WBINVD – Writeback and Invalidate DataCache0000 1111 : 0000 1001WRMSR – Write to Model-Specific Register0000 1111 : 0011 0000XADD – Exchange and Addregister1, register20000 1111 : 1100 000w : 11 reg2 reg1memory, reg0000 1111 : 1100 000w : mod reg r/mB-22 Vol.
2BINSTRUCTION FORMATS AND ENCODINGSTable B-13. General Purpose Instruction Formats and Encodingsfor Non-64-Bit Modes (Contd.)Instruction and FormatEncodingXCHG – Exchange Register/Memory withRegisterregister1 with register21000 011w : 11 reg1 reg2AX or EAX with reg1001 0 regmemory with reg1000 011w : mod reg r/mXLAT/XLATB – Table Look-up Translation1101 0111XOR – Logical Exclusive ORregister1 to register20011 000w : 11 reg1 reg2register2 to register10011 001w : 11 reg1 reg2memory to register0011 001w : mod reg r/mregister to memory0011 000w : mod reg r/mimmediate to register1000 00sw : 11 110 reg : immediate dataimmediate to AL, AX, or EAX0011 010w : immediate dataimmediate to memory1000 00sw : mod 110 r/m : immediate dataPrefix Bytesaddress size0110 0111LOCK1111 0000operand size0110 0110CS segment override0010 1110DS segment override0011 1110ES segment override0010 0110FS segment override0110 0100GS segment override0110 0101SS segment override0011 0110NOTES:1.
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