Volume 2B Instruction Set Reference N-Z (794102), страница 59
Текст из файла (страница 59)
2B 5-5VMX INSTRUCTION REFERENCEVirtual-8086 Mode Exceptions#UDIf executed outside VMX non-root operation.Compatibility Mode Exceptions#UDIf executed outside VMX non-root operation.64-Bit Mode Exceptions#UD5-6 Vol. 2BIf executed outside VMX non-root operation.VMCALL—Call to VM MonitorVMX INSTRUCTION REFERENCEVMCLEAR—Clear Virtual-Machine Control StructureOpcodeInstructionDescription66 0F C7 /6VMCLEAR m64Copy VMCS data to VMCS region in memory.DescriptionThis instruction applies to the VMCS whose VMCS region resides at the physicaladdress contained in the instruction operand. The instruction ensures that VMCSdata for that VMCS (some of these data may be currently maintained on theprocessor) are copied to the VMCS region in memory.
It also initializes parts of theVMCS region (for example, it sets the launch state of that VMCS to clear). SeeChapter 20, “Virtual-Machine Control Structures,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B.The operand of this instruction is always 64 bits and is always in memory. If theoperand is the current-VMCS pointer, then that pointer is made invalid (set toFFFFFFFF_FFFFFFFFH).Note that the VMCLEAR instruction might not explicitly write any VMCS data tomemory; the data may be already resident in memory before the VMCLEAR isexecuted.OperationIF (register operand) or (not in VMX operation) or (RFLAGS.VM = 1) or(IA32_EFER.LMA = 1 and CS.L = 0)THEN #UD;ELSIF in VMX non-root operationTHEN VM exit;ELSIF CPL > 0THEN #GP(0);ELSEaddr ← contents of 64-bit in-memory operand;IF addr is not 4KB-aligned OR(processor supports Intel 64 architecture andaddr sets any bits beyond the physical-address width) OR(processor does not support Intel 64 architecture, addr sets any bits in the range 63:32)THEN VMfail(VMCLEAR with invalid physical address);ELSIF addr = VMXON pointerTHEN VMfail(VMCLEAR with VMXON pointer);ELSEensure that data for VMCS referenced by the operand is in memory;initialize implementation-specific data in VMCS region;launch state of VMCS referenced by the operand ← “clear”VMCLEAR—Clear Virtual-Machine Control StructureVol.
2B 5-7VMX INSTRUCTION REFERENCEIF operand addr = current-VMCS pointerTHEN current-VMCS pointer ← FFFFFFFF_FFFFFFFFH;FI;VMsucceed;FI;FI;Flags AffectedSee the operation section and Section 5.2.Use of PrefixesLOCKCauses #UD.REP*Reserved and may cause unpredictable behavior (applies toboth REPNE/REPNZ and REP/REPE/REPZ).Segment overrides Treated normallyOperand sizeIgnoredAddress sizeTreated normallyREXRegister extensions treated normally; operand-size overridesignoredProtected Mode Exceptions#GP(0)If the current privilege level is not 0.If the memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains an unusable segment.If the operand is located in an execute-only code segment.#PF(fault-code)If a page fault occurs in accessing the memory operand.#SS(0)If the memory operand effective address is outside the SSsegment limit.#UDIf operand is a register.If the SS register contains an unusable segment.If not in VMX operation.Real-Address Mode Exceptions#UD5-8 Vol.
2BA logical processor cannot be in real-address mode while in VMXoperation and the VMCLEAR instruction is not recognized outsideVMX operation.VMCLEAR—Clear Virtual-Machine Control StructureVMX INSTRUCTION REFERENCEVirtual-8086 Mode Exceptions#UDThe VMCLEAR instruction is not recognized in virtual-8086mode.Compatibility Mode Exceptions#UDThe VMCLEAR instruction is not recognized in compatibilitymode.64-Bit Mode Exceptions#GP(0)If the current privilege level is not 0.If the source operand is in the CS, DS, ES, FS, or GS segmentsand the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs in accessing the memory operand.#SS(0)If the source operand is in the SS segment and the memoryaddress is in a non-canonical form.#UDIf operand is a register.If not in VMX operation.VMCLEAR—Clear Virtual-Machine Control StructureVol.
2B 5-9VMX INSTRUCTION REFERENCEVMLAUNCH/VMRESUME—Launch/Resume Virtual MachineOpcodeInstructionDescription0F 01 C2VMLAUNCHLaunch virtual machine managed by current VMCS.0F 01 C3VMRESUMEResume virtual machine managed by current VMCS.DescriptionEffects a VM entry managed by the current VMCS.•VMLAUNCH fails if the launch state of current VMCS is not “clear”. If theinstruction is successful, it sets the launch state to “launched.”•VMRESUME fails if the launch state of the current VMCS is not “launched.”If VM entry is attempted, the logical processor performs a series of consistencychecks as detailed in Chapter 22, “VM Entries,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B.
Failure to pass checks on the VMXcontrols or on the host-state area passes control to the instruction following theVMLAUNCH or VMRESUME instruction. If these pass but checks on the guest-statearea fail, the logical processor loads state from the host-state area of the VMCS,passing control to the instruction referenced by the RIP field in the host-state area.VM entry is not allowed when events are blocked by MOV SS or POP SS. NeitherVMLAUNCH nor VMRESUME should be used immediately after either MOV to SS orPOP to SS.OperationIF (not in VMX operation) or (RFLAGS.VM = 1) or(IA32_EFER.LMA = 1 and CS.L = 0)THEN #UD;ELSIF in VMX non-root operationTHEN VMexit;ELSIF CPL > 0THEN #GP(0);ELSIF current-VMCS pointer is not validTHEN VMfailInvalid;ELSIF events are being blocked by MOV SSTHEN VMfailValid(VM entry with events blocked by MOV SS);ELSIF (VMLAUNCH and launch state of current VMCS is not “clear”)THEN VMfailValid(VMLAUNCH with non-clear VMCS);ELSIF (VMRESUME and launch state of current VMCS is not “launched”)THEN VMfailValid(VMRESUME with non-launched VMCS);ELSECheck settings of VMX controls and host-state area;5-10 Vol.
2BVMLAUNCH/VMRESUME—Launch/Resume Virtual MachineVMX INSTRUCTION REFERENCEIF invalid settingsTHEN VMfailValid(VM entry with invalid VMX-control field(s)) orVMfailValid(VM entry with invalid host-state field(s)) orVMfailValid(VM entry with invalid executive-VMCS pointer)) orVMfailValid(VM entry with non-launched executive VMCS) orVMfailValid(VM entry with executive-VMCS pointer not VMXON pointer)orVMfailValid(VM entry with invalid VM-execution control fields in executiveVMCS)as appropriate;ELSEAttempt to load guest state and PDPTRs as appropriate;clear address-range monitoring;IF failure in checking guest state or PDPTRsTHEN VM entry fails (see Section 22.7, in theIntel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B);ELSEAttempt to load MSRs from VM-entry MSR-load area;IF failureTHEN VM entry fails (see Section 22.7, in the Intel® 64 and IA-32Architectures Software Developer’s Manual, Volume 3B);ELSEIF VMLAUNCHTHEN launch state of VMCS ← “launched”;FI;IF in SMM and “entry to SMM” VM-entry control is 0THENIF “deactivate dual-monitor treatment” VM-entrycontrol is 0THEN SMM-transfer VMCS pointer ←current-VMCS pointer;FI;IF executive-VMCS pointer is VMX pointerTHEN current-VMCS pointer ←VMCS-link pointer;ELSE current-VMCS pointer ←executive-VMCS pointer;FI;leave SMM;FI;VM entry succeeds;FI;FI;FI;VMLAUNCH/VMRESUME—Launch/Resume Virtual MachineVol.
2B 5-11VMX INSTRUCTION REFERENCEFI;Further details of the operation of the VM-entry appear in Chapter 22 of IA-32 IntelArchitecture Software Developer’s Manual, Volume 3B.Flags AffectedSee the operation section and Section 5.2.Use of PrefixesLOCKCauses #UDREP*Cause #UD (includes REPNE/REPNZ and REP/REPE/REPZ)Segment overrides IgnoredOperand sizeCauses #UDAddress sizeIgnoredREXIgnoredProtected Mode Exceptions#GP(0)If the current privilege level is not 0.#UDIf executed outside VMX operation.Real-Address Mode Exceptions#UDA logical processor cannot be in real-address mode while in VMXoperation and the VMLAUNCH and VMRESUME instructions arenot recognized outside VMX operation.Virtual-8086 Mode Exceptions#UDThe VMLAUNCH and VMRESUME instructions are not recognizedin virtual-8086 mode.Compatibility Mode Exceptions#UDThe VMLAUNCH and VMRESUME instructions are not recognizedin compatibility mode.64-Bit Mode Exceptions#GP(0)If the current privilege level is not 0.#UDIf executed outside VMX operation.5-12 Vol.
2BVMLAUNCH/VMRESUME—Launch/Resume Virtual MachineVMX INSTRUCTION REFERENCEVMPTRLD—Load Pointer to Virtual-Machine Control StructureOpcodeInstructionDescription0F C7 /6VMPTRLD m64Loads the current VMCS pointer from memory.DescriptionMarks the current-VMCS pointer valid and loads it with the physical address in theinstruction operand. The instruction fails if its operand is not properly aligned, setsunsupported physical-address bits, or is equal to the VMXON pointer. In addition, theinstruction fails if the 32 bits in memory referenced by the operand do not match theVMCS revision identifier supported by this processor.1The operand of this instruction is always 64 bits and is always in memory.OperationIF (register operand) or (not in VMX operation) or (RFLAGS.VM = 1) or(IA32_EFER.LMA = 1 and CS.L = 0)THEN #UD;ELSIF in VMX non-root operationTHEN VMexit;ELSIF CPL > 0THEN #GP(0);ELSEaddr ← contents of 64-bit in-memory source operand;IF addr is not 4KB-aligned OR(processor supports Intel 64 architecture andaddr sets any bits beyond the processor’s physical-address width) ORprocessor does not support Intel 64 architecture and addr sets any bits in the range 63:32THEN VMfail(VMPTRLD with invalid physical address);ELSIF addr = VMXON pointerTHEN VMfail(VMPTRLD with VMXON pointer);ELSErev ← 32 bits located at physical address addr;IF rev ≠ VMCS revision identifier supported by processorTHEN VMfail(VMPTRLD with incorrect VMCS revision identifier);ELSEcurrent-VMCS pointer ← addr;VMsucceed;1.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
