Volume 2B Instruction Set Reference N-Z (794102), страница 60
Текст из файла (страница 60)
Software should consult the VMX capability MSR VMX_BASIC to discover the VMCS revision identifier supported by this processor (see Appendix G, “VMX Capability Reporting Facility,” inthe Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B).VMPTRLD—Load Pointer to Virtual-Machine Control StructureVol.
2B 5-13VMX INSTRUCTION REFERENCEFI;FI;FI;Flags AffectedSee the operation section and Section 5.2.Use of PrefixesLOCKCauses #UDREPNE/REPNZCauses #UDREP/REPE/REPZChanges encoding to that of VMXON; see “VMXON—Enter VMXOperation” for operation and interactions with other prefixes.Segment overrides Treated normallyOperand sizeChanges encoding to that of VMCLEAR; see “VMCLEAR—ClearVirtual-Machine Control Structure” for operation and interactions with other prefixes.Address sizeTreated normallyREXRegister extensions treated normally; operand-size overridesignoredProtected Mode Exceptions#GP(0)If the current privilege level is not 0.If the memory source operand effective address is outside theCS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains an unusable segment.If the source operand is located in an execute-only codesegment.#PF(fault-code)If a page fault occurs in accessing the memory source operand.#SS(0)If the memory source operand effective address is outside theSS segment limit.If the SS register contains an unusable segment.#UDIf operand is a register.If not in VMX operation.Real-Address Mode Exceptions#UD5-14 Vol.
2BA logical processor cannot be in real-address mode while in VMXoperation and the VMPTRLD instruction is not recognizedoutside VMX operation.VMPTRLD—Load Pointer to Virtual-Machine Control StructureVMX INSTRUCTION REFERENCEVirtual-8086 Mode Exceptions#UDThe VMPTRLD instruction is not recognized in virtual-8086mode.Compatibility Mode Exceptions#UDThe VMPTRLD instruction is not recognized in compatibilitymode.64-Bit Mode Exceptions#GP(0)If the current privilege level is not 0.If the source operand is in the CS, DS, ES, FS, or GS segmentsand the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs in accessing the memory source operand.#SS(0)If the source operand is in the SS segment and the memoryaddress is in a non-canonical form.#UDIf operand is a register.If not in VMX operation.VMPTRLD—Load Pointer to Virtual-Machine Control StructureVol.
2B 5-15VMX INSTRUCTION REFERENCEVMPTRST—Store Pointer to Virtual-Machine Control StructureOpcodeInstructionDescription0F C7 /7VMPTRST m64Stores the current VMCS pointer into memory.DescriptionStores the current-VMCS pointer into a specified memory address. The operand ofthis instruction is always 64 bits and is always in memory.OperationIF (register operand) or (not in VMX operation) or (RFLAGS.VM = 1) or(IA32_EFER.LMA = 1 and CS.L = 0)THEN #UD;ELSIF in VMX non-root operationTHEN VMexit;ELSIF CPL > 0THEN #GP(0);ELSE64-bit in-memory destination operand ← current-VMCS pointer;VMsucceed;FI;Flags AffectedSee the operation section and Section 5.2.Use of PrefixesLOCKCauses #UDREP*Cause #UD (includes REPNE/REPNZ and REP/REPE/REPZ)Segment overrides Treated normallyOperand sizeCauses #UDAddress sizeTreated normallyREXRegister extensions treated normally; operand-size overridesignoredProtected Mode Exceptions#GP(0)If the current privilege level is not 0.If the memory destination operand effective address is outsidethe CS, DS, ES, FS, or GS segment limit.5-16 Vol.
2BVMPTRST—Store Pointer to Virtual-Machine Control StructureVMX INSTRUCTION REFERENCEIf the DS, ES, FS, or GS register contains an unusable segment.If the destination operand is located in a read-only datasegment or any code segment.#PF(fault-code)If a page fault occurs in accessing the memory destinationoperand.#SS(0)If the memory destination operand effective address is outsidethe SS segment limit.If the SS register contains an unusable segment.#UDIf operand is a register.If not in VMX operation.Real-Address Mode Exceptions#UDA logical processor cannot be in real-address mode while in VMXoperation and the VMPTRST instruction is not recognized outsideVMX operation.Virtual-8086 Mode Exceptions#UDThe VMPTRST instruction is not recognized in virtual-8086mode.Compatibility Mode Exceptions#UDThe VMPTRST instruction is not recognized in compatibilitymode.64-Bit Mode Exceptions#GP(0)If the current privilege level is not 0.If the destination operand is in the CS, DS, ES, FS, or GSsegments and the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs in accessing the memory destinationoperand.#SS(0)If the destination operand is in the SS segment and the memoryaddress is in a non-canonical form.#UDIf operand is a register.If not in VMX operation.VMPTRST—Store Pointer to Virtual-Machine Control StructureVol.
2B 5-17VMX INSTRUCTION REFERENCEVMREAD—Read Field from Virtual-Machine Control StructureOpcodeInstructionDescription0F 78VMREAD r/m64, r64Reads a specified VMCS field (in 64-bit mode).0F 78VMREAD r/m32, r32Reads a specified VMCS field (outside 64-bit mode).DescriptionReads a specified field from the VMCS and stores it into a specified destinationoperand (register or memory).The specific VMCS field is identified by the VMCS-field encoding contained in theregister source operand.
Outside IA-32e mode, the source operand has 32 bits,regardless of the value of CS.D. In 64-bit mode, the source operand has 64 bits;however, if bits 63:32 of the source operand are not zero, VMREAD will fail due to anattempt to access an unsupported VMCS component (see operation section).The effective size of the destination operand, which may be a register or in memory,is always 32 bits outside IA-32e mode (the setting of CS.D is ignored with respect tooperand size) and 64 bits in 64-bit mode. If the VMCS field specified by the sourceoperand is shorter than this effective operand size, the high bits of the destinationoperand are cleared to 0.
If the VMCS field is longer, then the high bits of the field arenot read.Note that any faults resulting from accessing a memory destination operand canoccur only after determining, in the operation section below, that the VMCS pointer isvalid and that the specified VMCS field is supported.OperationIF (not in VMX operation) or (RFLAGS.VM = 1) or(IA32_EFER.LMA = 1 and CS.L = 0)THEN #UD;ELSIF in VMX non-root operationTHEN VMexit;ELSIF CPL > 0THEN #GP(0);ELSIF current-VMCS pointer is not validTHEN VMfailInvalid;ELSIF register source operand does not correspond to any VMCS fieldTHEN VMfailValid(VMREAD/VMWRITE from/to unsupported VMCS component);ELSEDEST ← contents of VMCS field indexed by register source operand;VMsucceed;FI;5-18 Vol.
2BVMREAD—Read Field from Virtual-Machine Control StructureVMX INSTRUCTION REFERENCEFlags AffectedSee the operation section and Section 5.2.Use of PrefixesLOCKCauses #UDREP*Cause #UD (includes REPNE/REPNZ and REP/REPE/REPZ)Segment overrides Treated normallyOperand sizeCauses #UDAddress sizeTreated normallyREXRegister extensions treated normally; operand-size overridesignoredProtected Mode Exceptions#GP(0)If the current privilege level is not 0.If a memory destination operand effective address is outside theCS, DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains an unusable segment.If the destination operand is located in a read-only datasegment or any code segment.#PF(fault-code)If a page fault occurs in accessing a memory destinationoperand.#SS(0)If a memory destination operand effective address is outside theSS segment limit.If the SS register contains an unusable segment.#UDIf not in VMX operation.Real-Address Mode Exceptions#UDA logical processor cannot be in real-address mode while in VMXoperation and the VMREAD instruction is not recognized outsideVMX operation.Virtual-8086 Mode Exceptions#UDThe VMREAD instruction is not recognized in virtual-8086 mode.Compatibility Mode Exceptions#UDThe VMREAD instruction is not recognized in compatibility mode.64-Bit Mode Exceptions#GP(0)If the current privilege level is not 0.VMREAD—Read Field from Virtual-Machine Control StructureVol.
2B 5-19VMX INSTRUCTION REFERENCEIf the memory destination operand is in the CS, DS, ES, FS, orGS segments and the memory address is in a non-canonicalform.#PF(fault-code)If a page fault occurs in accessing a memory destinationoperand.#SS(0)If the memory destination operand is in the SS segment and thememory address is in a non-canonical form.#UDIf not in VMX operation.5-20 Vol.
2BVMREAD—Read Field from Virtual-Machine Control StructureVMX INSTRUCTION REFERENCEVMRESUME—Resume Virtual MachineSee VMLAUNCH/VMRESUME—Launch/Resume Virtual Machine.VMRESUME—Resume Virtual MachineVol. 2B 5-21VMX INSTRUCTION REFERENCEVMWRITE—Write Field to Virtual-Machine Control StructureOpcodeInstructionDescription0F 79VMWRITE r64, r/m64Writes.a specified VMCS field (in 64-bit mode)0F 79VMWRITE r32, r/m32Writes.a specified VMCS field (outside 64-bit mode)DescriptionWrites to a specified field in the VMCS specified by a secondary source operand(register only) using the contents of a primary source operand (register or memory).The VMCS field is identified by the VMCS-field encoding contained in the registersecondary source operand. Outside IA-32e mode, the secondary source operand isalways 32 bits, regardless of the value of CS.D.
In 64-bit mode, the secondary sourceoperand has 64 bits; however, if bits 63:32 of the secondary source operand are notzero, VMWRITE will fail due to an attempt to access an unsupported VMCS component (see operation section).The effective size of the primary source operand, which may be a register or inmemory, is always 32 bits outside IA-32e mode (the setting of CS.D is ignored withrespect to operand size) and 64 bits in 64-bit mode. If the VMCS field specified by thesecondary source operand is shorter than this effective operand size, the high bits ofthe primary source operand are ignored.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
