Volume 3 General-Purpose and System Instructions (794097), страница 27
Текст из файла (страница 27)
3.13—July 2007JccJump on ConditionChecks the status flags in the rFLAGS register and, if the flags meet the condition specified by thecondition code in the mnemonic (cc), jumps to the target instruction located at the specified relativeoffset. Otherwise, execution continues with the instruction following the Jcc instruction.Unlike the unconditional jump (JMP), conditional jump instructions have only two forms—short andnear conditional jumps. Different opcodes correspond to different forms of one instruction.
Forexample, the JO instruction (jump if overflow) has opcode 0Fh 80h for its near form and 70h for itsshort form, but the mnemonic is the same for both forms. The only difference is that the near form hasa 16- or 32-bit relative displacement, while the short form always has an 8-bit relative displacement.Mnemonics are provided to deal with the programming semantics of both signed and unsignednumbers. Instructions tagged A (above) and B (below) are intended for use in unsigned integer code;those tagged G (greater) and L (less) are intended for use in signed integer code.If the jump is taken, the signed displacement is added to the rIP (of the following instruction) and theresult is truncated to 16, 32, or 64 bits, depending on operand size.In 64-bit mode, the operand size defaults to 64 bits.
The processor sign-extends the 8-bit or 32-bitdisplacement value to 64 bits before adding it to the RIP.These instructions cannot perform far jumps (to other code segments). To create a far-conditionaljump code sequence corresponding to a high-level language statement like:IF A = B THEN GOTO FarLabelwhere FarLabel is located in another code segment, use the opposite condition in a conditional shortjump before an unconditional far jump. Such a code sequence might look like:cmpjnejmpNextInstr:A,BNextInstrfar FarLabel; compare operands; continue program if not equal; far jump if operands are equal; continue programFor details about control-flow instructions, see “Control Transfers” in Volume 1, and “ControlTransfer Privilege Checks” in Volume 2.MnemonicOpcodeDescriptionJO rel8offJO rel16offJO rel32off70 cb0F 80 cw0F 80 cdJump if overflow (OF = 1).JNO rel8offJNO rel16offJNO rel32off71 cb0F 81 cw0F 81 cdJump if not overflow (OF = 0).JB rel8offJB rel16offJB rel32off72 cb0F 82 cw0F 82 cdJump if below (CF = 1).130JccInstruction Reference24594—Rev.
3.13—July 2007MnemonicAMD64 TechnologyOpcodeDescriptionJC rel8offJC rel16offJC rel32off72 cb0F 82 cw0F 82 cdJump if carry (CF = 1).JNAE rel8offJNAE rel16offJNAE rel32off72 cb0F 82 cw0F 82 cdJump if not above or equal (CF = 1).JNB rel8offJNB rel16offJNB rel32off73 cb0F 83 cw0F 83 cdJump if not below (CF = 0).JNC rel8offJNC rel16offJNC rel32off73 cb0F 83 cw0F 83 cdJump if not carry (CF = 0).JAE rel8offJAE rel16offJAE rel32off73 cb0F 83 cw0F 83 cdJump if above or equal (CF = 0).JZ rel8offJZ rel16offJZ rel32off74 cb0F 84 cw0F 84 cdJump if zero (ZF = 1).JE rel8offJE rel16offJE rel32off74 cb0F 84 cw0F 84 cdJump if equal (ZF = 1).JNZ rel8offJNZ rel16offJNZ rel32off75 cb0F 85 cw0F 85 cdJump if not zero (ZF = 0).JNE rel8offJNE rel16offJNE rel32off75 cb0F 85 cw0F 85 cdJump if not equal (ZF = 0).JBE rel8offJBE rel16offJBE rel32off76 cb0F 86 cw0F 86 cdJump if below or equal (CF = 1 or ZF = 1).JNA rel8offJNA rel16offJNA rel32off76 cb0F 86 cw0F 86 cdJump if not above (CF = 1 or ZF = 1).JNBE rel8offJNBE rel16offJNBE rel32off77 cb0F 87 cw0F 87 cdJump if not below or equal (CF = 0 and ZF = 0).JA rel8offJA rel16offJA rel32off77 cb0F 87 cw0F 87 cdJump if above (CF = 0 and ZF = 0).JS rel8offJS rel16offJS rel32off78 cb0F 88 cw0F 88 cdJump if sign (SF = 1).JNS rel8offJNS rel16offJNS rel32off79 cb0F 89 cw0F 89 cdJump if not sign (SF = 0).Instruction ReferenceJcc131AMD64 TechnologyMnemonic24594—Rev.
3.13—July 2007OpcodeDescriptionJP rel8offJP rel16offJP rel32off7A cb0F 8A cw0F 8A cdJump if parity (PF = 1).JPE rel8offJPE rel16offJPE rel32off7A cb0F 8A cw0F 8A cdJump if parity even (PF = 1).JNP rel8offJNP rel16offJNP rel32off7B cb0F 8B cw0F 8B cdJump if not parity (PF = 0).JPO rel8offJPO rel16offJPO rel32off7B cb0F 8B cw0F 8B cdJump if parity odd (PF = 0).JL rel8offJL rel16offJL rel32off7C cb0F 8C cw0F 8C cdJump if less (SF <> OF).JNGE rel8offJNGE rel16offJNGE rel32off7C cb0F 8C cw0F 8C cdJump if not greater or equal (SF <> OF).JNL rel8offJNL rel16offJNL rel32off7D cb0F 8D cw0F 8D cdJump if not less (SF = OF).JGE rel8offJGE rel16offJGE rel32off7D cb0F 8D cw0F 8D cdJump if greater or equal (SF = OF).JLE rel8offJLE rel16offJLE rel32off7E cb0F 8E cw0F 8E cdJump if less or equal (ZF = 1 or SF <> OF).JNG rel8offJNG rel16offJNG rel32off7E cb0F 8E cw0F 8E cdJump if not greater (ZF = 1 or SF <> OF).JNLE rel8offJNLE rel16offJNLE rel32off7F cb0F 8F cw0F 8F cdJump if not less or equal (ZF = 0 and SF = OF).JG rel8offJG rel16offJG rel32off7F cb0F 8F cw0F 8F cdJump if greater (ZF = 0 and SF = OF).Related InstructionsJMP (Near), JMP (Far), JrCXZrFLAGS AffectedNone132JccInstruction Reference24594—Rev.
3.13—July 2007AMD64 TechnologyExceptionsExceptionGeneral protection,#GPVirtualReal 8086 ProtectedXInstruction ReferenceXXCause of ExceptionThe target offset exceeded the code segment limit or was noncanonical.Jcc133AMD64 Technology24594—Rev. 3.13—July 2007JCXZJECXZJRCXZJump if rCX ZeroChecks the contents of the count register (rCX) and, if 0, jumps to the target instruction located at thespecified 8-bit relative offset.
Otherwise, execution continues with the instruction following theJrCXZ instruction.The size of the count register (CX, ECX, or RCX) depends on the address-size attribute of the JrCXZinstruction. Therefore, JRCXZ can only be executed in 64-bit mode and JCXZ cannot be executed in64-bit mode.If the jump is taken, the signed displacement is added to the rIP (of the following instruction) and theresult is truncated to 16, 32, or 64 bits, depending on operand size.In 64-bit mode, the operand size defaults to 64 bits. The processor sign-extends the 8-bit displacementvalue to 64 bits before adding it to the RIP.For details about control-flow instructions, see “Control Transfers” in Volume 1, and “ControlTransfer Privilege Checks” in Volume 2.MnemonicOpcodeDescriptionJCXZ rel8offE3 cbJump short if the 16-bit count register (CX) is zero.JECXZ rel8offE3 cbJump short if the 32-bit count register (ECX) is zero.JRCXZ rel8offE3 cbJump short if the 64-bit count register (RCX) is zero.Related InstructionsJcc, JMP (Near), JMP (Far)rFLAGS AffectedNoneExceptionsExceptionGeneral protection,#GP134VirtualReal 8086 ProtectedXXXCause of ExceptionThe target offset exceeded the code segment limit or was noncanonicalJrCXZInstruction Reference24594—Rev.
3.13—July 2007AMD64 TechnologyJMP (Near)Near JumpUnconditionally transfers control to a new address without saving the current rIP value. This form ofthe instruction jumps to an address in the current code segment and is called a near jump.
The targetoperand can specify a register, a memory location, or a label.If the JMP target is specified in a register or memory location, then a 16-, 32-, or 64-bit rIP is read fromthe operand, depending on operand size. This rIP is zero-extended to 64 bits.If the JMP target is specified by a displacement in the instruction, the signed displacement is added tothe rIP (of the following instruction), and the result is truncated to 16, 32, or 64 bits depending onoperand size. The signed displacement can be 8 bits, 16 bits, or 32 bits, depending on the opcode andthe operand size.For near jumps in 64-bit mode, the operand size defaults to 64 bits.
The E9 opcode results in RIP = RIP+ 32-bit signed displacement, and the FF /4 opcode results in RIP = 64-bit offset from register ormemory. No prefix is available to encode a 32-bit operand size in 64-bit mode.See JMP (Far) for information on far jumps—jumps to procedures located outside of the current codesegment. For details about control-flow instructions, see “Control Transfers” in Volume 1, and“Control-Transfer Privilege Checks” in Volume 2.MnemonicOpcodeDescriptionJMP rel8offEB cbShort jump with the target specified by an 8-bit signeddisplacement.JMP rel16offE9 cwNear jump with the target specified by a 16-bit signeddisplacement.JMP rel32offE9 cdNear jump with the target specified by a 32-bit signeddisplacement.JMP reg/mem16FF /4Near jump with the target specified reg/mem16.JMP reg/mem32FF /4Near jump with the target specified reg/mem32.(No prefix for encoding in 64-bit mode.)JMP reg/mem64FF /4Near jump with the target specified reg/mem64.Related InstructionsJMP (Far), Jcc, JrCXrFLAGS AffectedNone.Instruction ReferenceJMP (Near)135AMD64 Technology24594—Rev.
3.13—July 2007ExceptionsExceptionStack, #SSGeneral protection,#GPVirtualReal 8086 ProtectedCause of ExceptionXXXA memory address exceeded the stack segment limit or wasnon-canonical.XXXA memory address exceeded a data segment limit or was noncanonical.XXXThe target offset exceeded the code segment limit or was noncanonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.136JMP (Near)Instruction Reference24594—Rev. 3.13—July 2007AMD64 TechnologyJMP (Far)Far JumpUnconditionally transfers control to a new address without saving the current CS:rIP values. This formof the instruction jumps to an address outside the current code segment and is called a far jump.
Theoperand specifies a target selector and offset.The target operand can be specified by the instruction directly, by containing the far pointer in the jmpfar opcode itself, or indirectly, by referencing a far pointer in memory. In 64-bit mode, only indirect farjumps are allowed, executing a direct far jmp (opcode EA) will generate an undefined opcodeexception. For both direct and indirect far calls, if the JMP (Far) operand-size is 16 bits, theinstruction's operand is a 16-bit selector followed by a 16-bit offset. If the operand-size is 32 or 64 bits,the operand is a 16-bit selector followed by a 32-bit offset.In all modes, the target selector used by the instruction can be a code selector.
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