Volume 2 System Programming (794096), страница 31
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Each type of model is described in the following sections.4.3.1 Multi-Segmented ModelIn the multi-segmented memory model, each segment register can reference a unique base addresswith a unique segment size. Segments can be as small as a single byte or as large as 4 Gbytes.
Whenpage translation is used, multiple segments can be mapped to a single page and multiple pages can bemapped to a single segment. Figure 1-1 on page 6 shows an example of the multi-segmented model.64Segmented Virtual Memory24593—Rev. 3.13—July 2007AMD64 TechnologyThe multi-segmented memory model provides the greatest level of flexibility for system softwareusing the segmentation mechanism.Compatibility mode allows the multi-segmented model to be used in support of legacy software.However, in compatibility mode, the multi-segmented memory model is restricted to the first 4 Gbytesof virtual-memory space.
Access to virtual memory above 4 Gbytes requires the use of 64-bit mode,which does not support segmentation.4.3.2 Flat-Memory ModelThe flat-memory model is the simplest form of segmentation to implement. Although segmentationcannot be disabled, the flat-memory model allows system software to bypass most of the segmentationmechanism. In the flat-memory model, all segment-base addresses have a value of 0 and the segmentlimits are fixed at 4 Gbytes. Clearing the segment-base value to 0 effectively disables segmenttranslation, resulting in a single segment spanning the entire virtual-address space.
All segmentdescriptors reference this single, flat segment. Figure 1-2 on page 7 shows an example of the flatmemory model.4.3.3 Segmentation in 64-Bit ModeIn 64-bit mode, segmentation is disabled. The segment-base value is ignored and treated as 0 by thesegmentation hardware. Likewise, segment limits and most attributes are ignored. There are a fewexceptions. The CS-segment DPL, D, and L attributes are used (respectively) to establish the privilegelevel for a program, the default operand size, and whether the program is running in 64-bit mode orcompatibility mode. The FS and GS segments can be used as additional base registers in addresscalculations, and those segments can have non-zero base-address values.
This facilitates addressingthread-local data and certain system-software data structures. See “FS and GS Registers in 64-BitMode” on page 70 for details about the FS and GS segments in 64-bit mode. The system-segmentregisters are always used in 64-bit mode.4.4Segmentation Data Structures and RegistersFigure 4-1 on page 66 shows the following data structures used by the segmentation mechanism:•••Segment Descriptors—As the name implies, a segment descriptor describes a segment, includingits location in virtual-address space, its size, protection characteristics, and other attributes.Descriptor Tables—Segment descriptors are stored in memory in one of three tables.
The globaldescriptor table (GDT) holds segment descriptors that can be shared among all tasks. Multiplelocal-descriptor tables (LDT) can be defined to hold descriptors that are used by specific tasks andare not shared globally. The interrupt-descriptor table (IDT) holds gate descriptors that are used toaccess the segments where interrupt handlers are located.Task-State Segment—A task-state segment (TSS) is a special type of system segment that containstask-state information and data structures for each task. For example, a TSS holds a copy of theGPRs and EFLAGS register when a task is suspended. A TSS also holds the pointers to privileged-Segmented Virtual Memory65AMD64 Technology•24593—Rev. 3.13—July 2007software stacks.
The TSS and task-switch mechanism are described in Chapter 12, “TaskManagement.”Segment Selectors—Descriptors are selected for use from the descriptor tables using a segmentselector. A segment selector contains an index into either the GDT or LDT. The IDT is indexedusing an interrupt vector, as described in “Legacy Protected-Mode Interrupt Control Transfers” onpage 229, and in “Long-Mode Interrupt Control Transfers” on page 239.Global-Descriptor Table (GDT)DescriptorDescriptor...Segment DescriptorsDescriptorCodeSegment SelectorsSelector 1Local-Descriptor Table (LDT)StackDescriptorSelector 2...DataDescriptor...GateDescriptorTask-State SegmentSelector nInterrupt-Descriptor Table (IDT)Gate DescriptorLocal-Descriptor TableGate Descriptor...Gate Descriptor513-263.epsFigure 4-1.
Segmentation Data StructuresFigure 4-2 on page 67 shows the registers used by the segmentation mechanism. The registers have thefollowing relationship to the data structures:•••66Segment Registers—The six segment registers (CS, DS, ES, FS, GS, and SS) are used to point tothe user segments. A segment selector selects a descriptor when it is loaded into one of the segmentregisters.
This causes the processor to automatically load the selected descriptor into a softwareinvisible portion of the segment register.Descriptor-Table Registers—The three descriptor-table registers (GDTR, LDTR, and IDTR) areused to point to the system segments. The descriptor-table registers identify the virtual-memorylocation and size of the descriptor tables.Task Register (TR)—Describes the location and limit of the current task state segment (TSS).Segmented Virtual Memory24593—Rev. 3.13—July 2007AMD64 TechnologyCode Segment RegisterGlobal-Descriptor-Table RegisterCSGDTRData Segment RegistersInterrupt-Descriptor-Table RegisterDSIDTRESLocal-Descriptor-Table RegisterFSLDTRGSTask RegisterStack Segment RegisterTRSS513-264.epsFigure 4-2.
Segment and Descriptor-Table RegistersA fourth system-segment register, the TR, points to the TSS. The data structures and registersassociated with task-state segments are described in “Task-Management Resources” on page 306.4.5Segment Selectors and Registers4.5.1 Segment SelectorsSegment selectors are pointers to specific entries in the global and local descriptor tables. Figure 4-3on page 67 shows the segment selector format.153SI21TIRPLBits Mnemonic Description15-3 SISelector Index2TITable Indicator1-0RPLRequestor Privilege Level0R/WR/WR/WR/WFigure 4-3. Segment SelectorSegmented Virtual Memory67AMD64 Technology24593—Rev.
3.13—July 2007The selector format consists of the following fields:Selector Index Field. Bits 15–3. The selector-index field specifies an entry in the descriptor table.Descriptor-table entries are eight bytes long, so the selector index is scaled by 8 to form a byte offsetinto the descriptor table. The offset is then added to either the global or local descriptor-table baseaddress (as indicated by the table-index bit) to form the descriptor-entry address in virtual-addressspace.Some descriptor entries in long mode are 16 bytes long rather than 8 bytes (see “Legacy SegmentDescriptors” on page 77 for more information on long-mode descriptor-table entries).
These expandeddescriptors consume two entries in the descriptor table. Long mode, however, continues to scale theselector index by eight to form the descriptor-table offset. It is the responsibility of system software toassign selectors such that they correctly point to the start of an expanded entry.Table Indicator (TI) Bit. Bit 2. The TI bit indicates which table holds the descriptor referenced by theselector index. When TI=0 the GDT is used and when TI=1 the LDT is used. The descriptor-table baseaddress is read from the appropriate descriptor-table register and added to the scaled selector index asdescribed above.Requestor Privilege-Level (RPL) Field.
Bits 1–0. The RPL represents the privilege level (CPL) theprocessor is operating under at the time the selector is created.RPL is used in segment privilege-checks to prevent software running at lesser privilege levels fromaccessing privileged data. See “Data-Access Privilege Checks” on page 95 and “Control-TransferPrivilege Checks” on page 98 for more information on segment privilege-checks.Null Selector. Null selectors have a selector index of 0 and TI=0, corresponding to the first entry inthe GDT.
However, null selectors do not reference the first GDT entry but are instead used to invalidateunused segment registers. A general-protection exception (#GP) occurs if a reference is made to use asegment register containing a null selector in non-64-bit mode. By initializing unused segmentregisters with null selectors software can trap references to unused segments.Null selectors can only be loaded into the DS, ES, FS and GS data-segment registers, and into theLDTR descriptor-table register.
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