Volume 3A System Programming Guide_ Part 1 (794103), страница 67
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A segment selector is valid if it is in a compatible type of table (GDT or LDT), occupies an addresswithin the table's segment limit, and refers to a compatible type of descriptor (for example, a segment selector in the CS register only is valid when it points to a code-segment descriptor).The TS (task switched) flag in the control register CR0 is set every time a task switchoccurs.
System software uses the TS flag to coordinate the actions of floating-pointunit when generating floating-point exceptions with the rest of the processor. The TSflag indicates that the context of the floating-point unit may be different from that ofthe current task. See Section 2.5, “Control Registers”, for a detailed description ofthe function and use of the TS flag.6.4TASK LINKINGThe previous task link field of the TSS (sometimes called the “backlink”) and the NTflag in the EFLAGS register are used to return execution to the previous task.EFLAGS.NT = 1 indicates that the currently executing task is nested within theexecution of another task.When a CALL instruction, an interrupt, or an exception causes a task switch: theprocessor copies the segment selector for the current TSS to the previous task linkfield of the TSS for the new task; it then sets EFLAGS.NT = 1.
If software uses anIRET instruction to suspend the new task, the processor checks for EFLAGS.NT = 1;it then uses the value in the previous task link field to return to the previous task. SeeFigures 6-8.When a JMP instruction causes a task switch, the new task is not nested. Theprevious task link field is not used and EFLAGS.NT = 0.
Use a JMP instruction todispatch a new task when nesting is not desired.6-16 Vol. 3TASK MANAGEMENTTop LevelTaskNestedTaskMore DeeplyNested TaskCurrently ExecutingTaskTSSTSSTSSEFLAGSNT=1NT=1NT=0PreviousTask LinkPreviousTask LinkNT=1PreviousTask LinkTask RegisterFigure 6-8. Nested TasksTable 6-2 shows the busy flag (in the TSS segment descriptor), the NT flag, theprevious task link field, and TS flag (in control register CR0) during a task switch.The NT flag may be modified by software executing at any privilege level.
It ispossible for a program to set the NT flag and execute an IRET instruction. This mightrandomly invoke the task specified in the previous link field of the current task's TSS.To keep such spurious task switches from succeeding, the operating system shouldinitialize the previous task link field in every TSS that it creates to 0.Table 6-2. Effect of a Task Switch on Busy Flag, NT Flag,Previous Task Link Field, and TS FlagFlag or FieldEffect of JMPinstructionEffect of CALLInstruction orInterruptEffect of IRETInstructionBusy (B) flag of newtask.Flag is set.
Must havebeen clear before.Flag is set. Must havebeen clear before.No change. Must havebeen set.Busy flag of old task.Flag is cleared.No change. Flag iscurrently set.Flag is cleared.NT flag of new task.Set to value from TSSof new task.Flag is set.Set to value from TSSof new task.NT flag of old task.No change.No change.Flag is cleared.Previous task link fieldof new task.No change.Loaded with selectorfor old task’s TSS.No change.Previous task link fieldof old task.No change.No change.No change.TS flag in controlregister CR0.Flag is set.Flag is set.Flag is set.Vol. 3 6-17TASK MANAGEMENT6.4.1Use of Busy Flag To Prevent Recursive Task SwitchingA TSS allows only one context to be saved for a task; therefore, once a task is called(dispatched), a recursive (or re-entrant) call to the task would cause the currentstate of the task to be lost.
The busy flag in the TSS segment descriptor is providedto prevent re-entrant task switching and a subsequent loss of task state information.The processor manages the busy flag as follows:1. When dispatching a task, the processor sets the busy flag of the new task.2. If during a task switch, the current task is placed in a nested chain (the taskswitch is being generated by a CALL instruction, an interrupt, or an exception),the busy flag for the current task remains set.3. When switching to the new task (initiated by a CALL instruction, interrupt, orexception), the processor generates a general-protection exception (#GP) if thebusy flag of the new task is already set. If the task switch is initiated with an IRETinstruction, the exception is not raised because the processor expects the busyflag to be set.4.
When a task is terminated by a jump to a new task (initiated with a JMPinstruction in the task code) or by an IRET instruction in the task code, theprocessor clears the busy flag, returning the task to the “not busy” state.The processor prevents recursive task switching by preventing a task from switchingto itself or to any task in a nested chain of tasks.
The chain of nested suspended tasksmay grow to any length, due to multiple calls, interrupts, or exceptions. The busyflag prevents a task from being invoked if it is in this chain.The busy flag may be used in multiprocessor configurations, because the processorfollows a LOCK protocol (on the bus or in the cache) when it sets or clears the busyflag. This lock keeps two processors from invoking the same task at the same time.See Section 7.1.2.1, “Automatic Locking,” for more information about setting thebusy flag in a multiprocessor applications.6.4.2Modifying Task LinkagesIn a uniprocessor system, in situations where it is necessary to remove a task from achain of linked tasks, use the following procedure to remove the task:1.
Disable interrupts.2. Change the previous task link field in the TSS of the pre-empting task (the taskthat suspended the task to be removed). It is assumed that the pre-empting taskis the next task (newer task) in the chain from the task to be removed. Changethe previous task link field to point to the TSS of the next oldest task in the chainor to an even older task in the chain.3.
Clear the busy (B) flag in the TSS segment descriptor for the task being removedfrom the chain. If more than one task is being removed from the chain, the busyflag for each task being remove must be cleared.4. Enable interrupts.6-18 Vol. 3TASK MANAGEMENTIn a multiprocessing system, additional synchronization and serialization operationsmust be added to this procedure to insure that the TSS and its segment descriptorare both locked when the previous task link field is changed and the busy flag iscleared.6.5TASK ADDRESS SPACEThe address space for a task consists of the segments that the task can access.These segments include the code, data, stack, and system segments referenced inthe TSS and any other segments accessed by the task code.
The segments aremapped into the processor’s linear address space, which is in turn mapped into theprocessor’s physical address space (either directly or through paging).The LDT segment field in the TSS can be used to give each task its own LDT. Giving atask its own LDT allows the task address space to be isolated from other tasks byplacing the segment descriptors for all the segments associated with the task in thetask’s LDT.It also is possible for several tasks to use the same LDT. This is a memory-efficientway to allow specific tasks to communicate with or control each other, without dropping the protection barriers for the entire system.Because all tasks have access to the GDT, it also is possible to create sharedsegments accessed through segment descriptors in this table.If paging is enabled, the CR3 register (PDBR) field in the TSS allows each task tohave its own set of page tables for mapping linear addresses to physical addresses.Or, several tasks can share the same set of page tables.6.5.1Mapping Tasks to the Linear and Physical Address SpacesTasks can be mapped to the linear address space and physical address space in oneof two ways:•One linear-to-physical address space mapping is shared among all tasks.— When paging is not enabled, this is the only choice.
Without paging, all linearaddresses map to the same physical addresses. When paging is enabled, thisform of linear-to-physical address space mapping is obtained by using one pagedirectory for all tasks. The linear address space may exceed the availablephysical space if demand-paged virtual memory is supported.•Each task has its own linear address space that is mapped to the physicaladdress space.
— This form of mapping is accomplished by using a differentpage directory for each task. Because the PDBR (control register CR3) is loadedon task switches, each task may have a different page directory.The linear address spaces of different tasks may map to completely distinct physicaladdresses. If the entries of different page directories point to different page tablesVol. 3 6-19TASK MANAGEMENTand the page tables point to different pages of physical memory, then the tasks donot share physical addresses.With either method of mapping task linear address spaces, the TSSs for all tasksmust lie in a shared area of the physical space, which is accessible to all tasks.