Volume 3A System Programming Guide_ Part 1 (794103), страница 60
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3 5-43INTERRUPT AND EXCEPTION HANDLINGTable 5-6. Invalid TSS Conditions (Contd.)Error Code IndexInvalid ConditionTSS segment selector indexThe TSS segment upper descriptor is not the correct type.TSS segment selector indexThe TSS segment descriptor contains a non-canonical base.TSS segment selector indexThere is a limit violation in attempting to load SS selector or ESPfrom a TSS on a call or exception which changes privilege levels inlegacy mode.TSS segment selector indexThere is a limit violation or canonical fault in attempting to load RSPor IST from a TSS on a call or exception which changes privilegelevels in IA-32e mode.This exception can generated either in the context of the original task or in thecontext of the new task (see Section 6.3, “Task Switching”).
Until the processor hascompletely verified the presence of the new TSS, the exception is generated in thecontext of the original task. Once the existence of the new TSS is verified, the taskswitch is considered complete. Any invalid-TSS conditions detected after this pointare handled in the context of the new task.
(A task switch is considered completewhen the task register is loaded with the segment selector for the new TSS and, if theswitch is due to a procedure call or interrupt, the previous task link field of the newTSS references the old TSS.)The invalid-TSS handler must be a task called using a task gate. Handling this exception inside the faulting TSS context is not recommended because the processor statemay not be consistent.Exception Error CodeAn error code containing the segment selector index for the segment descriptor thatcaused the violation is pushed onto the stack of the exception handler. If the EXT flagis set, it indicates that the exception was caused by an event external to the currentlyrunning program (for example, if an external interrupt handler using a task gateattempted a task switch to an invalid TSS).Saved Instruction PointerIf the exception condition was detected before the task switch was carried out, thesaved contents of CS and EIP registers point to the instruction that invoked the taskswitch.
If the exception condition was detected after the task switch was carried out,the saved contents of CS and EIP registers point to the first instruction of the newtask.Program State ChangeThe ability of the invalid-TSS handler to recover from the fault depends on the errorcondition than causes the fault. See Section 6.3, “Task Switching,” for more information on the task switch process and the possible recovery actions that can be taken.5-44 Vol. 3INTERRUPT AND EXCEPTION HANDLINGIf an invalid TSS exception occurs during a task switch, it can occur before or afterthe commit-to-new-task point. If it occurs before the commit point, no program statechange occurs.
If it occurs after the commit point (when the segment descriptorinformation for the new segment selectors have been loaded in the segment registers), the processor will load all the state information from the new TSS before itgenerates the exception. During a task switch, the processor first loads all thesegment registers with segment selectors from the TSS, then checks their contentsfor validity. If an invalid TSS exception is discovered, the remaining segment registers are loaded but not checked for validity and therefore may not be usable for referencing memory. The invalid TSS handler should not rely on being able to use thesegment selectors found in the CS, SS, DS, ES, FS, and GS registers without causinganother exception.
The exception handler should load all segment registers beforetrying to resume the new task; otherwise, general-protection exceptions (#GP) mayresult later under conditions that make diagnosis more difficult. The Intel recommended way of dealing situation is to use a task for the invalid TSS exceptionhandler.
The task switch back to the interrupted task from the invalid-TSS exceptionhandler task will then cause the processor to check the registers as it loads themfrom the TSS.Vol. 3 5-45INTERRUPT AND EXCEPTION HANDLINGInterrupt 11—Segment Not Present (#NP)Exception ClassFault.DescriptionIndicates that the present flag of a segment or gate descriptor is clear. The processorcan generate this exception during any of the following operations:•While attempting to load CS, DS, ES, FS, or GS registers. [Detection of a notpresent segment while loading the SS register causes a stack fault exception(#SS) to be generated.] This situation can occur while performing a task switch.•While attempting to load the LDTR using an LLDT instruction.
Detection of a notpresent LDT while loading the LDTR during a task switch operation causes aninvalid-TSS exception (#TS) to be generated.••When executing the LTR instruction and the TSS is marked not present.While attempting to use a gate descriptor or TSS that is marked segment-notpresent, but is otherwise valid.An operating system typically uses the segment-not-present exception to implementvirtual memory at the segment level.
If the exception handler loads the segment andreturns, the interrupted program or task resumes execution.A not-present indication in a gate descriptor, however, does not indicate that asegment is not present (because gates do not correspond to segments). The operating system may use the present flag for gate descriptors to trigger exceptions ofspecial significance to the operating system.A contributory exception or page fault that subsequently referenced a not-presentsegment would cause a double fault (#DF) to be generated instead of #NP.Exception Error CodeAn error code containing the segment selector index for the segment descriptor thatcaused the violation is pushed onto the stack of the exception handler. If the EXT flagis set, it indicates that the exception resulted from either:•an external event (NMI or INTR) that caused an interrupt, which subsequentlyreferenced a not-present segment•a benign exception that subsequently referenced a not-present segmentThe IDT flag is set if the error code refers to an IDT entry.
This occurs when the IDTentry for an interrupt being serviced references a not-present gate. Such an eventcould be generated by an INT instruction or a hardware interrupt.Saved Instruction PointerThe saved contents of CS and EIP registers normally point to the instruction thatgenerated the exception. If the exception occurred while loading segment descrip-5-46 Vol. 3INTERRUPT AND EXCEPTION HANDLINGtors for the segment selectors in a new TSS, the CS and EIP registers point to the firstinstruction in the new task. If the exception occurred while accessing a gatedescriptor, the CS and EIP registers point to the instruction that invoked the access(for example a CALL instruction that references a call gate).Program State ChangeIf the segment-not-present exception occurs as the result of loading a register (CS,DS, SS, ES, FS, GS, or LDTR), a program-state change does accompany the exception because the register is not loaded.
Recovery from this exception is possible bysimply loading the missing segment into memory and setting the present flag in thesegment descriptor.If the segment-not-present exception occurs while accessing a gate descriptor, aprogram-state change does not accompany the exception. Recovery from this exception is possible merely by setting the present flag in the gate descriptor.If a segment-not-present exception occurs during a task switch, it can occur beforeor after the commit-to-new-task point (see Section 6.3, “Task Switching”).
If itoccurs before the commit point, no program state change occurs. If it occurs afterthe commit point, the processor will load all the state information from the new TSS(without performing any additional limit, present, or type checks) before it generatesthe exception. The segment-not-present exception handler should not rely on beingable to use the segment selectors found in the CS, SS, DS, ES, FS, and GS registerswithout causing another exception.
(See the Program State Change description for“Interrupt 10—Invalid TSS Exception (#TS)” in this chapter for additional informationon how to handle this situation.)Vol. 3 5-47INTERRUPT AND EXCEPTION HANDLINGInterrupt 12—Stack Fault Exception (#SS)Exception ClassFault.DescriptionIndicates that one of the following stack related conditions was detected:•A limit violation is detected during an operation that refers to the SS register.Operations that can cause a limit violation include stack-oriented instructionssuch as POP, PUSH, CALL, RET, IRET, ENTER, and LEAVE, as well as other memoryreferences which implicitly or explicitly use the SS register (for example, MOVAX, [BP+6] or MOV AX, SS:[EAX+6]).
The ENTER instruction generates thisexception when there is not enough stack space for allocating local variables.•A not-present stack segment is detected when attempting to load the SS register.This violation can occur during the execution of a task switch, a CALL instructionto a different privilege level, a return to a different privilege level, an LSSinstruction, or a MOV or POP instruction to the SS register.Recovery from this fault is possible by either extending the limit of the stack segment(in the case of a limit violation) or loading the missing stack segment into memory (inthe case of a not-present violation.Exception Error CodeIf the exception is caused by a not-present stack segment or by overflow of the newstack during an inter-privilege-level call, the error code contains a segment selectorfor the segment that caused the exception.
Here, the exception handler can test thepresent flag in the segment descriptor pointed to by the segment selector to determine the cause of the exception. For a normal limit violation (on a stack segmentalready in use) the error code is set to 0.Saved Instruction PointerThe saved contents of CS and EIP registers generally point to the instruction thatgenerated the exception. However, when the exception results from attempting toload a not-present stack segment during a task switch, the CS and EIP registers pointto the first instruction of the new task.Program State ChangeA program-state change does not generally accompany a stack-fault exception,because the instruction that generated the fault is not executed.
Here, the instructioncan be restarted after the exception handler has corrected the stack fault condition.If a stack fault occurs during a task switch, it occurs after the commit-to-new-taskpoint (see Section 6.3, “Task Switching”). Here, the processor loads all the stateinformation from the new TSS (without performing any additional limit, present, ortype checks) before it generates the exception.
The stack fault handler should thus5-48 Vol. 3INTERRUPT AND EXCEPTION HANDLINGnot rely on being able to use the segment selectors found in the CS, SS, DS, ES, FS,and GS registers without causing another exception. The exception handler shouldcheck all segment registers before trying to resume the new task; otherwise, generalprotection faults may result later under conditions that are more difficult to diagnose.(See the Program State Change description for “Interrupt 10—Invalid TSS Exception(#TS)” in this chapter for additional information on how to handle this situation.)Vol. 3 5-49INTERRUPT AND EXCEPTION HANDLINGInterrupt 13—General Protection Exception (#GP)Exception ClassFault.DescriptionIndicates that the processor detected one of a class of protection violations called“general-protection violations.” The conditions that cause this exception to be generated comprise all the protection violations that do not cause other exceptions to begenerated (such as, invalid-TSS, segment-not-present, stack-fault, or page-faultexceptions).
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