Volume 2B Instruction Set Reference N-Z (794102), страница 48
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The source operand is then automatically selected to matchthe size of the destination operand (the AL register for byte operands, AX for wordoperands, EAX for doubleword operands). The explicit-operands form is provided toallow documentation; however, note that the documentation provided by this formcan be misleading. That is, the destination operand symbol must specify the correcttype (size) of the operand (byte, word, or doubleword), but it does not have tospecify the correct location.
The location is always specified by the ES:(E)DI4-344 Vol. 2BSTOS/STOSB/STOSW/STOSD/STOSQ—Store StringINSTRUCTION SET REFERENCE, N-Zregister. These must be loaded correctly before the store string instruction isexecuted.The no-operands form provides “short forms” of the byte, word, doubleword, andquadword versions of the STOS instructions.
Here also ES:(E)DI is assumed to be thedestination operand and AL, AX, or EAX is assumed to be the source operand. Thesize of the destination and source operands is selected by the mnemonic: STOSB(byte read from register AL), STOSW (word from AX), STOSD (doubleword fromEAX).After the byte, word, or doubleword is transferred from the register to the memorylocation, the (E)DI register is incremented or decremented according to the setting ofthe DF flag in the EFLAGS register. If the DF flag is 0, the register is incremented; ifthe DF flag is 1, the register is decremented (the register is incremented or decremented by 1 for byte operations, by 2 for word operations, by 4 for doubleword operations).In 64-bit mode, the default address size is 64 bits, 32-bit address size is supportedusing the prefix 67H.
Using a REX prefix in the form of REX.W promotes operation ondoubleword operand to 64 bits. The promoted no-operand mnemonic is STOSQ.STOSQ (and its explicit operands variant) store a quadword from the RAX registerinto the destination addressed by RDI or EDI. See the summary chart at the beginning of this section for encoding data and limits.The STOS, STOSB, STOSW, STOSD, STOSQ instructions can be preceded by the REPprefix for block loads of ECX bytes, words, or doublewords. More often, however,these instructions are used within a LOOP construct because data needs to be movedinto the AL, AX, or EAX register before it can be stored.
See“REP/REPE/REPZ/REPNE/REPNZ—Repeat String Operation Prefix” in this chapter fora description of the REP prefix.OperationNon-64-bit Mode:IF (Byte store)THENDEST ← AL;THEN IF DF = 0THEN (E)DI ← (E)DI + 1;ELSE (E)DI ← (E)DI – 1;FI;ELSE IF (Word store)THENDEST ← AX;THEN IF DF = 0THEN (E)DI ← (E)DI + 2;ELSE (E)DI ← (E)DI – 2;STOS/STOSB/STOSW/STOSD/STOSQ—Store StringVol. 2B 4-345INSTRUCTION SET REFERENCE, N-ZFI;FI;ELSE IF (Doubleword store)THENDEST ← EAX;THEN IF DF = 0THEN (E)DI ← (E)DI + 4;ELSE (E)DI ← (E)DI – 4;FI;FI;FI;64-bit Mode:IF (Byte store)THENDEST ← AL;THEN IF DF = 0THEN (R|E)DI ← (R|E)DI + 1;ELSE (R|E)DI ← (R|E)DI – 1;FI;ELSE IF (Word store)THENDEST ← AX;THEN IF DF = 0THEN (R|E)DI ← (R|E)DI + 2;ELSE (R|E)DI ← (R|E)DI – 2;FI;FI;ELSE IF (Doubleword store)THENDEST ← EAX;THEN IF DF = 0THEN (R|E)DI ← (R|E)DI + 4;ELSE (R|E)DI ← (R|E)DI – 4;FI;FI;ELSE IF (Quadword store using REX.W )THENDEST ← RAX;THEN IF DF = 0THEN (R|E)DI ← (R|E)DI + 8;ELSE (R|E)DI ← (R|E)DI – 8;FI;4-346 Vol.
2BSTOS/STOSB/STOSW/STOSD/STOSQ—Store StringINSTRUCTION SET REFERENCE, N-ZFI;FI;Flags AffectedNone.Protected Mode Exceptions#GP(0)If the destination is located in a non-writable segment.If a memory operand effective address is outside the limit of theES segment.If the ES register contains a NULL segment selector.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the ESsegment limit.#UDIf the LOCK prefix is used.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the ESsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made.#UDIf the LOCK prefix is used.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.STOS/STOSB/STOSW/STOSD/STOSQ—Store StringVol.
2B 4-347INSTRUCTION SET REFERENCE, N-ZSTR—Store Task RegisterOpcodeInstruction64-BitModeCompat/Leg ModeDescription0F 00 /1STR r/m16ValidValidStores segment selector from TR inr/m16.DescriptionStores the segment selector from the task register (TR) in the destination operand.The destination operand can be a general-purpose register or a memory location.The segment selector stored with this instruction points to the task state segment(TSS) for the currently running task.When the destination operand is a 32-bit register, the 16-bit segment selector iscopied into the lower 16 bits of the register and the upper 16 bits of the register arecleared.
When the destination operand is a memory location, the segment selector iswritten to memory as a 16-bit quantity, regardless of operand size.In 64-bit mode, operation is the same. The size of the memory operand is fixed at 16bits. In register stores, the 2-byte TR is zero extended if stored to a 64-bit register.The STR instruction is useful only in operating-system software. It can only beexecuted in protected mode.OperationDEST ← TR(SegmentSelector);Flags AffectedNone.Protected Mode Exceptions#GP(0)If the destination is a memory operand that is located in a nonwritable segment or if the effective address is outside the CS,DS, ES, FS, or GS segment limit.If the DS, ES, FS, or GS register is used to access memory and itcontains a NULL segment selector.#SS(0)If a memory operand effective address is outside the SSsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.4-348 Vol.
2BSTR—Store Task RegisterINSTRUCTION SET REFERENCE, N-ZReal-Address Mode Exceptions#UDThe STR instruction is not recognized in real-address mode.Virtual-8086 Mode Exceptions#UDThe STR instruction is not recognized in virtual-8086 mode.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.#SS(U)If the stack address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.STR—Store Task RegisterVol.
2B 4-349INSTRUCTION SET REFERENCE, N-ZSUB—SubtractOpcodeInstruction64-BitModeCompat/Leg ModeDescription2C ibSUB AL, imm8ValidValidSubtract imm8 from AL.2D iwSUB AX, imm16ValidValidSubtract imm16 from AX.2D idSUB EAX, imm32ValidValidSubtract imm32 from EAX.REX.W + 2D idSUB RAX, imm32ValidN.E.Subtract imm32 signextended to 64-bits fromRAX.80 /5 ibSUB r/m8, imm8ValidValidSubtract imm8 from r/m8.REX + 80 /5 ibSUB r/m8*, imm8ValidN.E.Subtract imm8 from r/m8.81 /5 iwSUB r/m16, imm16 ValidValidSubtract imm16 from r/m16.81 /5 idSUB r/m32, imm32 ValidValidSubtract imm32 from r/m32.REX.W + 81 /5 idSUB r/m64, imm32 ValidN.E.Subtract imm32 signextended to 64-bits fromr/m64.83 /5 ibSUB r/m16, imm8ValidValidSubtract sign-extended imm8from r/m16.83 /5 ibSUB r/m32, imm8ValidValidSubtract sign-extended imm8from r/m32.REX.W + 83 /5 ibSUB r/m64, imm8ValidN.E.Subtract sign-extended imm8from r/m64.28 /rSUB r/m8, r8ValidValidSubtract r8 from r/m8.REX + 28 /rSUB r/m8*, r8*ValidN.E.Subtract r8 from r/m8.29 /rSUB r/m16, r16ValidValidSubtract r16 from r/m16.29 /rSUB r/m32, r32ValidValidSubtract r32 from r/m32.REX.W + 29 /rSUB r/m64, r32ValidN.E.Subtract r64 from r/m64.2A /rSUB r8, r/m8ValidValidSubtract r/m8 from r8.REX + 2A /rSUB r8*, r/m8*ValidN.E.Subtract r/m8 from r8.2B /rSUB r16, r/m16ValidValidSubtract r/m16 from r16.2B /rSUB r32, r/m32ValidValidSubtract r/m32 from r32.REX.W + 2B /rSUB r64, r/m64ValidN.E.Subtract r/m64 from r64.NOTES:* In 64-bit mode, r/m8 can not be encoded to access the following byte registers if a REX prefix isused: AH, BH, CH, DH.4-350 Vol.
2BSUB—SubtractINSTRUCTION SET REFERENCE, N-ZDescriptionSubtracts the second operand (source operand) from the first operand (destinationoperand) and stores the result in the destination operand. The destination operandcan be a register or a memory location; the source operand can be an immediate,register, or memory location. (However, two memory operands cannot be used in oneinstruction.) When an immediate value is used as an operand, it is sign-extended tothe length of the destination operand format.The SUB instruction performs integer subtraction.
It evaluates the result for bothsigned and unsigned integer operands and sets the OF and CF flags to indicate anoverflow in the signed or unsigned result, respectively. The SF flag indicates the signof the signed result.In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefixin the form of REX.R permits access to additional registers (R8-R15).
Using a REXprefix in the form of REX.W promotes operation to 64 bits. See the summary chart atthe beginning of this section for encoding data and limits.This instruction can be used with a LOCK prefix to allow the instruction to beexecuted atomically.OperationDEST ← (DEST – SRC);Flags AffectedThe OF, SF, ZF, AF, PF, and CF flags are set according to the result.Protected Mode Exceptions#GP(0)If the destination is located in a non-writable segment.If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a NULL segmentselector.#SS(0)If a memory operand effective address is outside the SSsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used but the destination is not a memoryoperand.Real-Address Mode Exceptions#GPSUB—SubtractIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.Vol.
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