Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 31
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3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function0000_0001h or function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACX64-Bit Media Instruction Reference213AMD64 Technology26569—Rev.
3.08—July 2007PXORPacked Logical Bitwise Exclusive ORPerforms a bitwise exclusive OR of the values in the first and second source operands and writes theresult in the destination (first source). The first source/destination operand is an MMX register and thesecond source operand is another MMX register or 64-bit memory location.The PXOR instruction is an MMX™ instruction. The presence of this instruction set is indicated byCPUID feature bits. (See “CPUID” in Volume 3.)MnemonicOpcodePXOR mmx1, mmx2/mem640F EF /rDescriptionPerforms bitwise logical XOR of values in an MMX registerand in another MMX register or 64-bit memory locationand writes the result in the destination MMX register.mmx1mmx2/mem64063630XORpxor-64.epsRelated InstructionsPAND, PANDN, PORrFLAGS AffectedNone21464-Bit Media Instruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function 0000_0001hor function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDPage fault, #PFx87 floating-pointexception pending,#MFAlignment check, #ACX64-Bit Media Instruction Reference215AMD64 Technology21626569—Rev.
3.08—July 200764-Bit Media Instruction Reference26569—Rev. 3.08—July 20072AMD64 Technologyx87 Floating-Point Instruction ReferenceThis chapter describes the function, mnemonic syntax, opcodes, condition codes, affected flags, andpossible exceptions generated by the x87 floating-point instructions.
The x87 floating-pointinstructions are used in legacy floating-point applications. Most of these instructions load, store, oroperate on data located in the x87 ST(0)–ST(7) stack registers (the FPR0–FPR7 physical registers).The remaining instructions within this category are used to manage the x87 floating-pointenvironment.A given hardware implementation of the AMD64 architecture supports the x87 floating-pointinstructions if the following CPUID functions are set:••On-Chip Floating-Point Unit, indicated by bit 0 of CPUID function 0000_0001h and function8000_0001h.CMOVcc (conditional moves), FCOMI(P) and FUCOMI(P), indicated by bit 15 of CPUIDfunction 0000_0001h and function 8000_0001h.
A 1 in this bit indicates support for x87 floatingpoint conditional moves (FCMOVcc) whenever the On-Chip Floating-Point Unit bit (bit 0) is also1.The x87 instructions can be used in legacy mode or long mode. Their use in long mode is available ifthe following CPUID function bit is set to 1:•Long Mode, indicated by bit 29 of CPUID function 8000_0001h.Compilation of x87 media programs for execution in 64-bit mode offers two primary advantages:access to the 64-bit virtual address space and access to the RIP-relative addressing mode.For further information about the x87 floating-point instructions and register resources, see:•••••“x87 Floating-Point Programming” in Volume 1.“128-Bit, 64-Bit, and x87 Programming” in Volume 2.“Summary of Registers and Data Types” in Volume 3.“Notation” in Volume 3.“Instruction Prefixes” in Volume 3.Instruction Reference217AMD64 Technology26569—Rev.
3.08—July 2007Floating-Point Compute 2x–1F2XM1Raises 2 to the power specified by the value in ST(0), subtracts 1, and stores the result in ST(0). Thesource value must be in the range –1.0 to +1.0. The result is undefined for source values outside thisrange.This instruction, when used in conjunction with the FYL2X instruction, can be applied to calculatez = xy by taking advantage of the log property xy = 2y*log2x.MnemonicF2XM1OpcodeDescriptionReplace ST(0) with (2ST(0) – 1).D9 F0Related InstructionsFYL2X, FYL2XP1rFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.218F2XM1Instruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) were set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XXXA source operand was an SNaN value or an unsupportedformat.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Instruction ReferenceF2XM1219AMD64 Technology26569—Rev.
3.08—July 2007FABSFloating-Point Absolute ValueConverts the value in ST(0) to its absolute value by clearing the sign bit. The resulting value dependsupon the type of number used as the source value:Source Value (ST(0))Result (ST(0))-∞+∞-FiniteReal+FiniteReal-0+0+0+0+FiniteReal+FiniteReal+∞+∞NaNNaNThis operation applies even if the value in ST(0) is negative zero or negative infinity.MnemonicFABSOpcodeD9 E1DescriptionReplace ST(0) with its absolute value.Related InstructionsFPREM, FRNDINT, FXTRACT, FCHSrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC10C2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.220FABSInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE) withstack fault (SF)Instruction ReferenceXXXAn x87 stack underflow occurred.FABS221AMD64 Technology26569—Rev.
3.08—July 2007FADDFADDPFIADDFloating-Point AddAdds two values and stores the result in a floating-point register. If two operands are specified, thevalues are in ST(0) and another floating-point register and the instruction stores the result in the firstregister specified. If one operand is specified, the instruction adds the 32-bit or 64-bit value in thespecified memory location to the value in ST(0).The FADDP instruction adds the value in ST(0) to the value in another floating-point register and popsthe register stack. If two operands are specified, the first operand is the other register. If no operand isspecified, then the other register is ST(1).The FIADD instruction reads a 16-bit or 32-bit signed integer value from the specified memorylocation, converts it to double-extended-real format, and adds it to the value in ST(0).MnemonicOpcodeDescriptionFADD ST(0),ST(i)D8 C0+iReplace ST(0) with ST(0) + ST(i).FADD ST(i),ST(0)DC C0+iReplace ST(i) with ST(0) + ST(i).FADD mem32realD8 /0Replace ST(0) with ST(0) + mem32real.FADD mem64realDC /0Replace ST(0) with ST(0) + mem64real.FADDPDE C1Replace ST(1) with ST(0) + ST(1), and pop the x87 register stack.FADDP ST(i),ST(0)DE C0+iReplace ST(i) with ST(0) + ST(i), and pop the x87 register stack.FIADD mem16intDE /0Replace ST(0) with ST(0) + mem16int.FIADD mem32intDA /0Replace ST(0) with ST(0) + mem32int.Related InstructionsNonerFLAGS AffectedNone222FADDxInstruction Reference26569—Rev.
3.08—July 2007AMD64 Technologyx87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of theinstruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFXXXA source operand was an SNaN value or an unsupportedformat.XXX+infinity was added to –infinity.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Overflow exception(OE)XXXA rounded result was too large to fit into the format of thedestination operand.Invalid-operationexception (IE)Instruction ReferenceFADDx223AMD64 TechnologyException26569—Rev.
3.08—July 2007RealVirtual8086 ProtectedCause of ExceptionUnderflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in thedestination format.224FADDxInstruction Reference26569—Rev. 3.08—July 2007FBLDAMD64 TechnologyFloating-Point Load Binary-Coded DecimalConverts a 10-byte packed BCD value in memory into double-extended-precision format, and pushesthe result onto the x87 stack. In the process, it preserves the sign of the source value.The packed BCD digits should be in the range 0 to 9. Attempting to load invalid digits (Ah through Fh)produces undefined results.MnemonicFBLD mem80decOpcodeDF /4DescriptionConvert a packed BCD value to floating-point and push theresult onto the x87 register stack.Related InstructionsFBSTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription1x87 stack overflow, if an x87 register stack fault was detected.0If no other flags are set.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
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