Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 35
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Unaffected flags are blank. Undefined flags are U.254FINCSTPInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.Instruction ReferenceCause of ExceptionFINCSTP255AMD64 Technology26569—Rev.
3.08—July 2007FINITFNINITFloating-Point InitializeSets the x87 control word register, status word register, tag word register, instruction pointer, and datapointer to their default states as follows:••••Sets the x87 control word to 037Fh—round to nearest (RC = 00b); double-extended-precision (PC= 11b); all exceptions masked (PM, UM, OM, ZM, DM, and IM all set to 1).Clears all bits in the x87 status word (TOP is set to 0, which maps ST(0) onto FPR0).Marks all x87 stack registers as empty (11b) in the x87 tag register.Clears the instruction pointer and the data pointer.These instructions do not actually zero out the x87 stack registers.Assemblers usually provide an FINIT macro that expands into the instruction sequenceWAITFNINIT destination; Opcode 9B; Opcode DB E3The WAIT (9Bh) instruction checks for pending x87 exceptions and calls an exception handler, ifnecessary.
The FNINIT instruction then resets the x87 environment to its default state.MnemonicOpcodeDescriptionFINIT9B DB E3Perform a WAIT (9B) to check for pending floating-pointexceptions and then initialize the x87 unit.FNINITDB E3Initialize the x87 unit without checking for unmaskedfloating-point exceptions.Related InstructionsFWAIT, WAITrFLAGS AffectedNone256FINIT (FNINIT)Instruction Reference26569—Rev. 3.08—July 2007AMD64 Technologyx87 Condition Codex87 Condition CodeValueC00C10C20C30DescriptionNote: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefined flags are U.ExceptionsExceptionRealDevice not available,#NMXInstruction ReferenceVirtual8086 ProtectedXXCause of ExceptionThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.FINIT (FNINIT)257AMD64 Technology26569—Rev.
3.08—July 2007FISTFISTPFloating-Point Integer StoreConverts the value in ST(0) to a signed integer, rounds it if necessary, and copies it to the specifiedmemory location. The rounding control (RC) field of the x87 control word determines the type ofrounding used.The FIST instruction supports 16-bit and 32-bit values. The FISTP instructions supports 16-bit, 32-bit,and 64-bit values.The FISTP instruction pops the stack after storing the rounded value in memory.If the value is too large for the destination location, is a NaN, or is in an unsupported format, theinstruction sets the invalid-operation exception (IE) bit in the x87 status word to 1.
Then, if theexception is masked (IM bit set to 1 in the x87 control word), the instruction stores the integerindefinite value. If the exception is unmasked (IM bit cleared to 0), the instruction does not store thevalue.MnemonicOpcodeDescriptionFIST mem16intDF /2Convert the contents of ST(0) to integer and store the resultin mem16int.FIST mem32intDB /2Convert the contents of ST(0) to integer and store the resultin mem32int.FISTP mem16intDF /3Convert the contents of ST(0) to integer, store the result inmem16int, and pop the x87 register stack.FISTP mem32intDB /3Convert the contents of ST(0) to integer, store the result inmem32int, and pop the x87 register stack.FISTP mem64intDF /7Convert the contents of ST(0) to integer, store the result inmem64int, and pop the x87 register stack.Table 2-1 shows the results of storing various types of numbers as integers.Table 2-1.Storing Numbers as IntegersST(0)DEST-∞Invalid-operation (IE) exception–Finite-real < –1–Integer (Invalid-operation (IE) exception if the integer is too large for thedestination)–1 < –Finite-real< –00 or –1, depending on the rounding mode-00+00+0 < +Finite-real < +10 or +1, depending on the rounding mode258FISTxInstruction Reference26569—Rev.
3.08—July 2007Table 2-1.AMD64 TechnologyStoring Numbers as Integers (continued)ST(0)DEST+Finite-real > +1+Integer (Invalid-operation (IE) exception if the integer is too large for thedestination)+∞Invalid-operation (IE) exceptionNaNInvalid-operation (IE) exceptionRelated InstructionsFLD, FST, FSTP, FILD, FBLD, FBSTP, FISTTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank.
Undefined flags are U.Instruction ReferenceFISTx259AMD64 Technology26569—Rev. 3.08—July 2007ExceptionsVirtual8086 ProtectedExceptionRealInvalid opcode, #UDXXXThe SSE3 instructions are not supported, as indicated byECX bit 0 of CPUID function 0000_0001h.Device not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPCause of ExceptionPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFXXXThe source operand was too large for the destinationformat.XXXA source operand was an SNaN value, a QNaN value,+-infinity, or an unsupported format.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Invalid-operationexception (IE)260FISTxInstruction Reference26569—Rev.
3.08—July 2007FISTTPAMD64 TechnologyFloating Point Integer Truncate and StoreConverts a floating-point value in ST(0) to an integer by truncating the fractional part of the numberand storing the integer result to the memory address specified by the destination operand. FISTTP thenpops the floating point register stack. The FISTTP instruction ignores the rounding mode specified bythe x87 control word.The FISTTP instruction applies to 16-bit, 32-bit, and 64-bit operands.The FISTTP instruction is an SSE3 instruction. The presence of this instruction set is indicated by aCPUID feature bit. (See “CPUID” in Volume 3.)MnemonicOpcodeDescriptionFISTTP mem16intDF /1Store the truncated floating-point value in ST(0) inmemory location mem16int and pop the floating-pointregister stack.FISTTP mem32intDB /1Store the truncated floating-point value in ST(0) inmemory location mem32int and pop the floating-pointregister stack.FISTTP mem64intDD /1Store the truncated floating-point value in ST(0) inmemory location mem64int and pop the floating-pointregister stack.Table 2-2 shows the results of storing various types of numbers as integers.Table 2-2.
Storing Numbers as IntegersST(0)DESTINATION-∞Invalid-operation (IE) exception–Finite-real ≤ –1–Integer (Invalid-operation (IE) exception if the integer is too large for the destination)-1 < Finite-real < +10+Finite-real ≥ +1+Integer (Invalid-operation (IE) exception if the integer is too large for the destination)+∞Invalid-operation (IE) exceptionNaNInvalid-operation (IE) exceptionRelated InstructionsFLD, FST, FSTP, FILD, FBLD, FBSTP, FISTPrFLAGS AffectedNoneInstruction ReferenceFISTTP261AMD64 Technology26569—Rev.
3.08—July 2007x87 Condition Codex87 Condition CodeValue*C0UDescriptionx87 stack underflow, if an x87 register stack fault was detected.C10C2UC3UFP number is rounded down (always done since the instruction forcestruncate mode).Note: *A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefined flags are U.ExceptionsExceptionRealVirtual8086 ProtectedCause of Exception#UDXXXThe SSE3 instructions are not supported, as indicated byECX bit 0 of CPUID function 0000_0001h.Device not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFXXXThe source operand was too large for the destinationformat.XXXA source operand was an SNaN value, a QNaN value,+infinity, or an unsupported format.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Invalid-operationexception (IE)262FISTTPInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyFLDFloating-Point LoadPushes a value in memory or in a floating-point register onto the register stack. If in memory, the valuecan be a single-precision, double-precision, or double-extended-precision floating-point value. Theoperation converts a single-precision or double-precision value to double-extended-precision formatbefore pushing it onto the stack.MnemonicOpcodeDescriptionFLD ST(i)D9 C0+iPush the contents of ST(i) onto the x87 register stack.FLD mem32realD9 /0Push the contents of mem32real onto the x87 register stack.FLD mem64realDD /0Push the contents of mem64real onto the x87 register stack.FLD mem80realDB /5Push the contents of mem80real onto the x87 register stack.Related InstructionsFFREE, FST, FSTP, FILD, FIST, FISTP, FBLD, FBSTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1Description0x87 stack underflow, if an x87 register stack fault was detected.1x87 stack overflow, if an x87 register stack fault was detected.0No x87 stack fault.C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
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