Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 32
Текст из файла (страница 32)
Unaffected flags are blank. Undefined flags are U.Instruction ReferenceFBLD225AMD64 Technology26569—Rev. 3.08—July 2007ExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE) withstack fault (SF)226XXXAn x87 stack overflow occurred.FBLDInstruction Reference26569—Rev.
3.08—July 2007FBSTPAMD64 TechnologyFloating-Point Store Binary-Coded Decimal andPopConverts the value in ST(0) to an 18-digit packed BCD integer, stores the result in the specifiedmemory location, and pops the register stack. It rounds a non-integral value to an integer value,depending on the rounding mode specified by the RC field of the x87 control word.The operand specifies the memory address of the first byte of the resulting 10-byte value.MnemonicOpcodeFBSTP mem80decDF /6DescriptionConvert the floating-point value in ST(0) to BCD, store the result inmem80, and pop the x87 register stack.Related InstructionsFBLDrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.Instruction ReferenceFBSTP227AMD64 Technology26569—Rev. 3.08—July 2007ExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPCause of ExceptionPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFXXXA source operand was an SNaN value, a QNaN value,±infinity or an unsupported format.XXXA source operand was too large to fit in the destinationformat.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Invalid-operationexception (IE)228FBSTPInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyFCHSFloating-Point Change SignCompliments the sign bit of ST(0), changing the value from negative to positive or vice versa. Thisoperation applies to positive and negative floating point values, as well as –0 and +0, NaNs, and +∞and –∞.MnemonicOpcodeFCHSDescriptionD9 E0Reverse the sign bit of ST(0).Related InstructionsFABS, FPREM, FRNDINT, FXTRACTrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC10C2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE) withstack fault (SF)XInstruction ReferenceXXAn x87 stack underflow occurred.FCHS229AMD64 Technology26569—Rev. 3.08—July 2007FCLEX(FNCLEX)Floating-Point Clear FlagsClears the following flags in the x87 status word:••••Floating-point exception flags (PE, UE, OE, ZE, DE, and IE)Stack fault flag (SF)Exception summary status flag (ES)Busy flag (B)It leaves the four condition-code bits undefined.
It does not check for possible floating-pointexceptions before clearing the flags.Assemblers usually provide an FCLEX macro that expands into the instruction sequenceWAITFNCLEX destination; Opcode 9B; Opcode DB E2The WAIT (9Bh) instruction checks for pending x87 exceptions and calls an exception handler, ifnecessary. The FNCLEX instruction then clears all the relevant x87 exception flags.MnemonicOpcodeDescriptionFCLEX9B DB E2Perform a WAIT (9B) to check for pending floating-pointexceptions, and then clear the floating-point exception flags.FNCLEXDB E2Clear the floating-point flags without checking for pendingunmasked floating-point exceptions.Related InstructionsWAITrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1UC2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefined flags are U.230FCLEX (FNCLEX)Instruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealDevice not available,#NMXInstruction ReferenceVirtual8086 ProtectedXXCause of ExceptionThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.FCLEX (FNCLEX)231AMD64 Technology26569—Rev. 3.08—July 2007FCMOVccFloating-Point Conditional MoveTests the flags in the rFLAGS register and, depending upon the values encountered, moves the value inanother stack register to ST(0).This set of instructions includes the mnemonics FCMOVB, FCMOVBE, FCMOVE, FCMOVNB,FCMOVNBE, FCMOVNE, FCMOVNU, and FCMOVU.Support for the FCMOVcc instruction is indicated when both EDX bit 0 (FPU) and ECX bit 15(CMOV) are set to 1, as returned by either CPUID function 0000_0001h or function 8000_0001h.MnemonicOpcodeDescriptionFCMOVB ST(0),ST(i)DA C0+iMove the contents of ST(i) into ST(0) if below (CF = 1).FCMOVBE ST(0),ST(i)DA D0+iMove the contents of ST(i) into ST(0) if below or equal (CF =1 or ZF = 1).FCMOVE ST(0),ST(i)DA C8+iMove the contents of ST(i) into ST(0) if equal (ZF = 1).FCMOVNB ST(0),ST(i)DB C0+iMove the contents of ST(i) into ST(0) if not below (CF = 0).FCMOVNBE ST(0),ST(i)DB D0+iMove the contents of ST(i) into ST(0) if not below or equal(CF = 0 and ZF = 0).FCMOVNE ST(0),ST(i)DB C8+iMove the contents of ST(i) into ST(0) if not equal (ZF = 0).FCMOVNU ST(0),ST(i)DB D8+iMove the contents of ST(i) into ST(0) if not unordered (PF =0).FCMOVU ST(0),ST(i)DA D8+iMove the contents of ST(i) into ST(0) if unordered (PF = 1).Related InstructionsNonerFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC10C2UC3UDescriptionx87 stack underflow, if an x87 register stack fault was detected.Note: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.232FCMOVccInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsExceptionVirtualReal 8086 ProtectedCause of ExceptionInvalid opcode, #UDXXXThe Conditional Move instructions are not supported, asindicated by EDX bit 0 and EDX bit 15 in CPUID function0000_0001h or function 8000_0001h.Device notavailable, #NMXXXThe emulate bit (EM) or the task switch bit (TS) of the controlregister (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE) withstack fault (SF)XInstruction ReferenceXXAn x87 stack underflow occurred.FCMOVcc233AMD64 Technology26569—Rev.
3.08—July 2007FCOMFCOMPFCOMPPFloating-Point CompareCompares the specified value to the value in ST(0) and sets the C0, C2, and C3 condition code flags inthe x87 status word as shown in the x87 Condition Code table below. The specified value can be in afloating-point register or a memory location.The no-operand version compares the value in ST(1) with the value in ST(0).The comparison operation ignores the sign of zero (–0.0 = +0.0).After performing the comparison operation, the FCOMP instruction pops the x87 register stack andthe FCOMPP instruction pops the x87 register stack twice.If either or both of the compared values is a NaN or is in an unsupported format, the FCOMxinstruction sets the invalid-operation exception (IE) bit in the x87 status word to 1. Then, if theexception is masked (IM bit set to 1 in the x87 control word), the instruction sets the condition flags to“unordered.” If the exception is unmasked (IM bit cleared to 0), the instruction does not set thecondition code flags.The FUCOMx instructions perform the same operations as the FCOMx instructions, but do not set theIE bit for QNaNs.MnemonicOpcodeDescriptionFCOMD8 D1Compare the contents of ST(0) to the contents of ST(1) andset condition flags to reflect the results of the comparison.FCOM ST(i)D8 D0+iCompare the contents of ST(0) to the contents of ST(i) andset condition flags to reflect the results of the comparison.FCOM mem32realD8 /2Compare the contents of ST(0) to the contents ofmem32real and set condition flags to reflect the results ofthe comparison.FCOM mem64realDC /2Compare the contents of ST(0) to the contents ofmem64real and set condition flags to reflect the results ofthe comparison.FCOMPD8 D9Compare the contents of ST(0) to the contents of ST(1), setcondition flags to reflect the results of the comparison, andpop the x87 register stack.FCOMP ST(i)D8 D8+iCompare the contents of ST(0) to the contents of ST(i), setcondition flags to reflect the results of the comparison, andpop the x87 register stack.FCOMP mem32realD8 /3Compare the contents of ST(0) to the contents ofmem32real, set condition flags to reflect the results of thecomparison, and pop the x87 register stack.234FCOMxInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyFCOMP mem64realDC /3Compare the contents of ST(0) to the contents ofmem64real, set condition flags to reflect the results of thecomparison, and pop the x87 register stack.FCOMPPDE D9Compare the contents of ST(0) to the contents of ST(1), setcondition flags to reflect the results of the comparison, andpop the x87 register stack twice.Related InstructionsFCOMI, FCOMIP, FICOM, FICOMP, FTST, FUCOMI, FUCOMIP, FXAMrFLAGS AffectedNonex87 Condition CodeC3C2C1C0Compare Result0000ST(0) > source0001ST(0) < source1000ST(0) = source1101Operands were unorderedExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XInstruction ReferenceXXA source operand was an SNaN value, a QNaN value, oran unsupported format.FCOMx235AMD64 TechnologyException26569—Rev.
3.08—July 2007RealVirtual8086 ProtectedCause of ExceptionInvalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.236FCOMxInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyFCOMIFCOMIPFloating-Point Compare and Set FlagsCompares the value in ST(0) with the value in another floating-point register and sets the zero flag(ZF), parity flag (PF), and carry flag (CF) in the rFLAGS register based on the result as shown in thetable in the x87 Condition Code section.The comparison operation ignores the sign of zero (–0.0 = +0.0).After performing the comparison operation, FCOMIP pops the x87 register stack.If either or both of the compared values is a NaN or is in an unsupported format, the FCOMIxinstruction sets the invalid-operation exception (IE) bit in the x87 status word to 1.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
