Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 28
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3.08—July 2007PSUBBPacked Subtract BytesSubtracts each packed 8-bit integer value in the second source operand from the corresponding packed8-bit integer in the first source operand and writes the integer result of each subtraction in thecorresponding byte of the destination (first source). The first source/destination operand is an MMXregister and the second source operand is another MMX register or 64-bit memory location.This instruction operates on both signed and unsigned integers.
If the result overflows, the carry isignored (neither the overflow nor carry bit in rFLAGS is set), and only the low-order 8 bits of eachresult are written in the destination.The PSUBB instruction is an MMX™ instruction. The presence of this instruction set is indicated byCPUID feature bits. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBB mmx1, mmx2/mem640F F8 /rDescriptionSubtracts packed byte integer values in an MMX registeror 64-bit memory location from packed byte integervalues in another MMX register and writes the result inthe destination MMX register.mmx1....mmx2/mem64..630.....63.0......subtractsubtractpsubb-64.epsRelated InstructionsPSUBD, PSUBQ, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNone184PSUBBInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function0000_0001h or function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACInstruction ReferenceXPSUBB185AMD64 Technology26569—Rev.
3.08—July 2007PSUBDPacked Subtract DoublewordsSubtracts each packed 32-bit integer value in the second source operand from the correspondingpacked 32-bit integer in the first source operand and writes the integer result of each subtraction in thecorresponding doubleword of the destination (first source). The first source/destination operand is anMMX register and the second source operand is another MMX register or 64-bit memory location.This instruction operates on both signed and unsigned integers. If the result overflows, the carry isignored (neither the overflow nor carry bit in rFLAGS is set), and only the low-order 32 bits of eachresult are written in the destination.The PSUBD instruction is an MMX™ instruction.
The presence of this instruction set is indicated byCPUID feature bits. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBD mmx1, mmx2/mem640F FA /rDescriptionSubtracts packed 32-bit integer values in an MMXregister or 64-bit memory location from packed 32-bitinteger values in another MMX register and writes theresult in the destination MMX register.mmx163mmx2/mem6432 3106332 310subtractsubtractpsubd-64.epsRelated InstructionsPSUBB, PSUBQ, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNone186PSUBDInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function0000_0001h or function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACInstruction ReferenceXPSUBD187AMD64 Technology26569—Rev.
3.08—July 2007PSUBQPacked Subtract QuadwordSubtracts each packed 64-bit integer value in the second source operand from the correspondingpacked 64-bit integer in the first source operand and writes the integer result of each subtraction in thecorresponding quadword of the destination (first source). The first source/destination and sourceoperands are an MMX register and another MMX register or 64-bit memory location.The PSUBQ instruction is an SSE2 instruction; check the status of EDX bit 26 returned by CPUIDfunction 0000_0001h. (See “CPUID” in Volume 3.)This instruction operates on both signed and unsigned integers. If the result overflows, the carry isignored (neither the overflow nor carry bit in rFLAGS is set), and only the low-order 64 bits of eachresult are written in the destination.MnemonicOpcodePSUBQ mmx1, mmx2/mem640F FB /rDescriptionSubtracts packed 64-bit integer values in an MMXregister or 64-bit memory location from packed 64-bitinteger values in another MMX register and writes theresult in the destination MMX register.mmx163mmx2/mem640630subtractpsubq-64.epsRelated InstructionsPSUBB, PSUBD, PSUBSB, PSUBSW, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNone188PSUBQInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe SSE2 instructions are not supported, asindicated by EDX bit 26 in CPUID function0000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACInstruction ReferenceXPSUBQ189AMD64 Technology26569—Rev.
3.08—July 2007PSUBSBPacked Subtract Signed With Saturation BytesSubtracts each packed 8-bit signed integer value in the second source operand from the correspondingpacked 8-bit signed integer in the first source operand and writes the signed integer result of eachsubtraction in the corresponding byte of the destination (first source). The first source/destinationoperand is an MMX register and the second source operand is another MMX register or 64-bit memorylocation.For each packed value in the destination, if the value is larger than the largest signed 8-bit integer, it issaturated to 7Fh, and if the value is smaller than the smallest signed 8-bit integer, it is saturated to 80h.The PSUBBSB instruction is an MMX™ instruction. The presence of this instruction set is indicatedby CPUID feature bits. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBSB mmx1, mmx2/mem640F E8 /rDescriptionSubtracts packed byte signed integer values in anMMX register or 64-bit memory location from packedbyte integer values in another MMX register and writesthe result in the destination MMX register.mmx1....mmx2/mem64..630.....63.0......subtractsaturatesubtractsaturatepsubsb-64.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSW, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNone190PSUBSBInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function0000_0001h or function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACInstruction ReferenceXPSUBSB191AMD64 Technology26569—Rev.
3.08—July 2007PSUBSWPacked Subtract Signed With Saturation WordsSubtracts each packed 16-bit signed integer value in the second source operand from thecorresponding packed 16-bit signed integer in the first source operand and writes the signed integerresult of each subtraction in the corresponding word of the destination (first source). The firstsource/destination and source operands are an MMX register and another MMX register or 64-bitmemory location.For each packed value in the destination, if the value is larger than the largest signed 16-bit integer, it issaturated to 7FFFh, and if the value is smaller than the smallest signed 16-bit integer, it is saturated to8000h.The PSUBSW instruction is an MMX™ instruction.
The presence of this instruction set is indicated byCPUID feature bits. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBSW mmx1, mmx2/mem640F E9 /rDescriptionSubtracts packed 16-bit signed integer values in anMMX register or 64-bit memory location from packed16-bit integer values in another MMX register andwrites the result in the destination MMX register.mmx1.mmx2/mem64.63 48 47 32 31 16 15.063 48 47 32 31 16 15..0.subtractsaturatesubtractsaturatepsubsw-64.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSB, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNone192PSUBSWInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe emulate bit (EM) of CR0 was set to 1.XXXThe MMX™ instructions are not supported, asindicated by EDX bit 23 in CPUID function0000_0001h or function 8000_0001h.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXA page fault resulted from the execution of theinstruction.XXAn unmasked x87 floating-point exception waspending.XXAn unaligned memory reference was performed whilealignment checking was enabled.Invalid opcode, #UDGeneral protection, #GPPage fault, #PFx87 floating-pointexception pending, #MFAlignment check, #ACInstruction ReferenceXPSUBSW193AMD64 Technology26569—Rev.
3.08—July 2007PSUBUSBPacked Subtract Unsigned and Saturate BytesSubtracts each packed 8-bit unsigned integer value in the second source operand from thecorresponding packed 8-bit unsigned integer in the first source operand and writes the unsigned integerresult of each subtraction in the corresponding byte of the destination (first source). The firstsource/destination operand is an MMX register and the second source operand is another MMXregister or 64-bit memory location.For each packed value in the destination, if the value is larger than the largest unsigned 8-bit integer, itis saturated to FFh, and if the value is smaller than the smallest unsigned 8-bit integer, it is saturated to00h.The PSUBUSB instruction is an MMX™ instruction.
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