Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 34
Текст из файла (страница 34)
3.08—July 2007ExceptionRealAMD64 TechnologyVirtual8086 ProtectedCause of ExceptionOverflow exception(OE)XXXA rounded result was too large to fit into the format of thedestination operand.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Instruction ReferenceFDIVx245AMD64 Technology26569—Rev. 3.08—July 2007FDIVRFDIVRPFIDIVRFloating-Point Divide ReverseDivides a value in a floating-point register or a memory location by the value in a floating-pointregister and stores the result in the register containing the divisor. For the FDIVR and FDIVRPinstructions, a dividend value in memory can be stored in single-precision or double-precisionfloating-point format.If one operand is specified, the instruction divides the value at the specified memory location by thevalue in ST(0).
If two operands are specified, it divides the value in ST(0) by the value in another x87stack register or vice versa.The FIDIVR instruction converts a dividend in word integer or short integer format to doubleextended-precision format before performing the division.The FDIVRP instruction pops the x87 register stack after performing the division operation. If nooperand is specified, the FDIVRP instruction divides the value in ST(0) by the value in ST(1).If the zero-divide exception is not masked (ZM bit cleared to 0 in the x87 control word) and theoperation causes a zero-divide exception (sets the ZE bit in the x87 status word to 1), the operationstores no result.
If the zero-divide exception is masked (ZM bit set to 1), a zero-divide exceptioncauses ±∞ to be stored.The sign of the operands, even if one of the operands is 0, determines the sign of the result.MnemonicOpcodeDescriptionFDIVR ST(0),ST(i)D8 F8+iReplace ST(0) with ST(i)/ST(0).FDIVR ST(i), ST(0)DC F0+iReplace ST(i) with ST(0)/ST(i).FDIVR mem32realD8 /7Replace ST(0) with mem32real/ST(0).FDIVR mem64realDC /7Replace ST(0) with mem64real/ST(0).FDIVRPDE F1Replace ST(1) with ST(0)/ST(1), and pop the x87 registerstack.FDIVRP ST(i), ST(0)DE F0 +iReplace ST(i) with ST(0)/ST(i), and pop the x87 registerstack.FIDIVR mem16intDE /7Replace ST(0) with mem16int/ST(0).FIDIVR mem32intDA /7Replace ST(0) with mem32int/ST(0).Related InstructionsFDIV, FDIVP, FIDIV246FDIVRxInstruction Reference26569—Rev.
3.08—July 2007AMD64 TechnologyrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit or isnon-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or isnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)Invalid-operationexception (IE) withstack fault (SF)XXXA source operand was an SNaN value or an unsupportedformat.XXX±infinity was divided by ±infinity.XXX±zero was divided by ±zero.XXXAn x87 stack underflow occurred.Instruction ReferenceFDIVRx247AMD64 TechnologyException26569—Rev.
3.08—July 2007RealVirtual8086 ProtectedCause of ExceptionDenormalizedoperand exception(DE)XXXA source operand was a denormal value.Zero-divideexception (ZE)XXXA non-zero value was divided by ±zero.Overflow exception(OE)XXXA rounded result was too large to fit into the format of thedestination operand.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.248FDIVRxInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyFFREEFloating-Point Free RegisterFrees the specified x87 stack register by marking its tag register entry as empty. The instruction doesnot affect the contents of the freed register or the top-of-stack pointer (TOP).MnemonicOpcodeFFREE ST(i)DescriptionDD C0+iSet the tag for x87 stack register i to empty (11b).Related InstructionsFLD, FST, FSTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1UC2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) is set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.Instruction ReferenceCause of ExceptionFFREE249AMD64 Technology26569—Rev. 3.08—July 2007FICOMFICOMPFloating-Point Integer CompareConverts a 16-bit or 32-bit signed integer value to double-extended-precision format, compares it tothe value in ST(0), and sets the C0, C2, and C3 condition code flags in the x87 status word to reflect theresults.The comparison operation ignores the sign of zero (–0.0 = +0.0).After performing the comparison operation, the FICOMP instruction pops the x87 register stack.If ST(0) is a NaN or is in an unsupported format, the instruction sets the condition flags to“unordered.”MnemonicFICOM mem16intFICOM mem32intFICOMP mem16intFICOMP mem32intOpcodeDescriptionDE /2Convert the contents of mem16int to double-extendedprecision format, compare the result to the contents ofST(0), and set condition flags to reflect the results of thecomparison.DA /2Convert the contents of mem32int to double-extendedprecision format, compare the result to the contents ofST(0), and set condition flags to reflect the results of thecomparison.DE /3Convert the contents of mem16int to double-extendedprecision format, compare the result to the contents ofST(0), set condition flags to reflect the results of thecomparison, and pop the x87 register stack.DA /3Convert the contents of mem32int to double-extendedprecision format, compare the result to the contents ofST(0), set condition flags to reflect the results of thecomparison, and pop the x87 register stack.Related InstructionsFCOM, FCOMPP, FCOMI, FCOMIP, FTST, FUCOMI, FUCOMIP, FXAMrFLAGS AffectedNone250FICOMxInstruction Reference26569—Rev.
3.08—July 2007AMD64 Technologyx87 Condition CodeC3C2C1C0Compare Result0000ST(0) > source0001ST(0) < source1000ST(0) = source1101Operands were unorderedExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XXXA source operand was an SNaN value, a QNaN value, or anunsupported format.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Instruction ReferenceFICOMx251AMD64 Technology26569—Rev.
3.08—July 2007FILDFloating-Point Load IntegerConverts a signed-integer in memory to double-extended-precision format and pushes the value ontothe x87 register stack. The value can be a 16-bit, 32-bit, or 64- bit integer value. Signed values frommemory can always be represented exactly in x87 registers without rounding.MnemonicOpcodeDescriptionFILD mem16intDF /0Push the contents of mem16int onto the x87 register stack.FILD mem32intDB /0Push the contents of mem32int onto the x87 register stack.FILD mem64intDF /5Push the contents of mem64int onto the x87 register stack.Related InstructionsFLD, FST, FSTP, FIST, FISTP, FBLD, FBSTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No stack overflow.1x87 stack overflow, if an x87 register stack fault was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.252FILDInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) is set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE) withstack fault (SF)XInstruction ReferenceXXAn x87 stack overflow occurred.FILD253AMD64 Technology26569—Rev.
3.08—July 2007FINCSTPFloating-Point Increment Stack-Top PointerIncrements the top-of-stack pointer (TOP) field of the x87 status word. If the TOP field contains 7, it iscleared to 0. In other words, this instruction rotates the stack by one position.MnemonicOpcodeFINCSTPD9 F7DescriptionIncrement the TOP field in the x87 status word.Before FINCSTPAfter FINCSTPData RegisterValueStack PointerStack PointerValue7num1ST(7)ST(6)num16num2ST(6)ST(5)num25num3ST(5)ST(4)num34num4ST(4)ST(3)num43num5ST(3)ST(2)num52num6ST(2)ST(1)num61num7ST(1)ST(0)num70num8ST(0)ST(7)num8Related InstructionsFDECSTPrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC10C2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
