Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 39
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The 94-byte operand is required for a 16-bit operand-size; the 108-bytememory area is required for both 32-bit and 64-bit operand sizes. The layout of the saved x87 statewithin the specified memory area depends on whether the processor is operating in protected or realmode. See “Media and x87 Processor State” in Volume 2 for details on how this instruction stores thex87 environment in memory. (Because FSAVE does not save the full 64-bit data and instructionpointers, 64-bit applications should use FXSAVE/FXRSTOR, rather than FSAVE/FRSTOR.)Because the MMX registers are mapped onto the low 64 bits of the x87 floating-point registers, thisoperation also restores the MMX state.If FRSTOR results in set exception flags in the loaded x87 status word register, and these exceptionsare unmasked in the x87 control word register, a floating-point exception occurs when the nextfloating-point instruction is executed (except for the no-wait floating-point instructions).To avoid generating exceptions when loading a new environment, use the FCLEX or FNCLEXinstruction to clear the exception flags in the x87 status word before storing that environment.For details about the memory image restored by FRSTOR, see “Media and x87 Processor State” inVolume 2.MnemonicFRSTORmem94/108envOpcodeDD /4DescriptionLoad the x87 state from mem94/108env.Related InstructionsFSAVE, FNSAVE, FXSAVE, FXRSTORrFLAGS AffectedNone290FRSTORInstruction Reference26569—Rev.
3.08—July 2007AMD64 Technologyx87 Condition Codex87 Condition CodeValueDescriptionC0MLoaded from memory.C1MLoaded from memory.C2MLoaded from memory.C3MLoaded from memory.Note: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank. Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.General protection,#GPXXXA memory address exceeded a data segment limit or wasnon-canonical.XA null data segment was used to reference memory.Page fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXInstruction ReferenceFRSTOR291AMD64 Technology26569—Rev.
3.08—July 2007FSAVEFNSAVEFloating-Point Save x87 and MMX™ StateStores the complete x87 state to memory starting at the specified address and reinitializes the x87 state.The FSAVE instruction takes a memory operand that specifies the starting address of either a 94-byteor 108-byte area in memory. The 94-byte operand is required for a 16-bit operand-size; the 108-bytememory area is required for both 32-bit and 64-bit operand sizes. The layout of the saved x87 statewithin the specified memory area depends on whether the processor is operating in protected or realmode. See “Media and x87 Processor State” in Volume 2 for details on how this instruction stores thex87 environment in memory.
(Because FSAVE does not save the full 64-bit data and instructionpointers, 64-bit applications should use FXSAVE/FXRSTOR, rather than FSAVE/FRSTOR.)Because the MMX registers are mapped onto the low 64 bits of the x87 floating-point registers, thisoperation also saves the MMX state.The FNSAVE instruction does not wait for pending unmasked x87 floating-point exceptions to beprocessed.Assemblers usually provide an FSAVE macro that expands into the instruction sequenceWAITFNSAVE destination; Opcode 9B; Opcode DD /6The WAIT (9Bh) instruction checks for pending x87 exceptions and calls an exception handler, ifnecessary.
The FNSAVE instruction then stores the x87 state to the specified destination.MnemonicOpcodeDescriptionFSAVE mem94/108env9B DD /6Copy the x87 state to mem94/108env after checking forpending floating-point exceptions, then reinitialize the x87state.FNSAVEmem94/108envDD /6Copy the x87 state to mem94/108env without checking forpending floating-point exceptions, then reinitialize the x87state.Related InstructionsFRSTOR, FXSAVE, FXRSTORrFLAGS AffectedNone292FSAVE (FNSAVE)Instruction Reference26569—Rev. 3.08—July 2007AMD64 Technologyx87 Condition Codex87 Condition CodeValueC00C10C20C30DescriptionExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit or wasnon-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPCause of ExceptionPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.Instruction ReferenceFSAVE (FNSAVE)293AMD64 Technology26569—Rev.
3.08—July 2007FSCALEFloating-Point ScaleMultiplies the floating-point value in ST(0) by 2 to the power of the integer portion of the floatingpoint value in ST(1).This instruction provides an efficient method of multiplying (or dividing) by integral powers of 2because, typically, it simply adds the integer value to the exponent of the value in ST(0), leaving thesignificand unaffected.
However, if the value in ST(0) is a denormal value, the mantissa is alsomodified and the result may end up being a normalized number. Likewise, if overflow or underflowresults from a scale operation, the mantissa of the resulting value will be different from that of thesource.The FSCALE instruction performs the reverse operation to that of the FXTRACT instruction.MnemonicOpcodeFSCALED9 FDDescriptionReplace ST(0) with ST(0) ∗ 2rndint(ST(1))Related InstructionsFSQRT, FPREM, FPREM1, FRNDINT, FXTRACT, FABS, FCHSrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UUndefined.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C2UUndefined.C3UUndefinedC1DescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.294FSCALEInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) is set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XXXA source operand was an SNaN value or an unsupportedformat.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Overflow exception(OE)XXXA rounded result was too large to fit into the format of thedestination operand.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Instruction ReferenceFSCALE295AMD64 Technology26569—Rev.
3.08—July 2007FSINFloating-Point SineComputes the sine of the radian value in ST(0) and stores the result in ST(0).The source value must be in the range –263 to +263 radians. If the value lies outside this range, theinstruction sets the C2 bit in the x87 status word to 1 and does not change the value in ST(0).MnemonicFSINOpcodeDescriptionD9 FEReplace ST(0) with the sine of ST(0).Related InstructionsFCOS, FPATAN, FPTAN, FSINCOSrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UDescription0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.0Source operand was in range.1Source operand was out of range.C1C2C3UNote: A flag set to 1 or cleared to 0 is M (modified).
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