Volume 5 64-Bit Media and x87 Floating-Point Instructions (794099), страница 40
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Unaffected flags are blank. Undefined flags are U.296FSINInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFXXXA source operand was an SNaN value or an unsupportedformat.XXXA source operand was ±infinity.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Invalid-operationexception (IE)Instruction ReferenceFSIN297AMD64 Technology26569—Rev.
3.08—July 2007FSINCOSFloating-Point Sine and CosineComputes the sine and cosine of the value in ST(0), stores the sine in ST(0), and pushes the cosine ontothe x87 register stack. The source value must be in the range –263 to +263 radians.If the source operand is outside this range, the instruction sets the C2 bit in the x87 status word to 1 anddoes not change the value in ST(0).MnemonicOpcodeFSINCOSD9 FBDescriptionReplace ST(0) with the sine of ST(0), then push the cosineof ST(0) onto the x87 register stack.Related InstructionsFCOS, FPATAN, FPTAN, FSINrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1Description0No precision exception occurred.0x87 stack underflow, if an x87 register stack fault was detected.1x87 stack overflow, if an x87 register stack fault was detected.0Result in ST(1) was rounded down, if a precision exception wasdetected.1Result in ST(1) was rounded up, if a precision exception was detected.0Source operand was in range.1Source operand was out of range.C2C3UNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.298FSINCOSInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealCause of ExceptionDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of the controlregister (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XXXA source operand was an SNaN value or an unsupportedformat.XXXA source operand was ±infinity.Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.XXXAn x87 stack overflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Instruction ReferenceFSINCOS299AMD64 Technology26569—Rev.
3.08—July 2007FSQRTFloating-Point Square RootComputes the square root of the value in ST(0) and stores the result in ST(0). Taking the square root of+infinity returns +infinity.MnemonicOpcodeFSQRTD9 FADescriptionReplace ST(0) with the square root of ST(0).Related InstructionsFSCALE, FPREM, FPREM1, FRNDINT, FXTRACT, FABS, FCHSrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1Description0x87 stack underflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank.
Undefined flags are U.300FSQRTInstruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionDevice notavailable, #NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.x87 floating-pointexception pending,#MFXXXAn unmasked x87 floating-point exception was pending.x87 Floating-Point Exception Generated, #MFXXXA source operand was an SNaN value or an unsupportedformat.XXXA source operand was a negative value (not including zero).Invalid-operationexception (IE) withstack fault (SF)XXXAn x87 stack underflow occurred.Denormalizedoperand exception(DE)XXXA source operand was a denormal value.Precision exception(PE)XXXA result could not be represented exactly in the destinationformat.Invalid-operationexception (IE)Instruction ReferenceFSQRT301AMD64 Technology26569—Rev. 3.08—July 2007FSTFSTPFloating-Point Store Stack TopCopies the value in ST(0) to the specified floating-point register or memory location.The FSTP instruction pops the x87 stack after copying the value.
The instruction FSTP ST(0) is thesame as popping the stack with no data transfer.If the specified destination is a single-precision or double-precision memory location, the instructionconverts the value to the appropriate precision format. It does this by rounding the significand of thesource value as specified by the rounding mode determined by the RC field of the x87 control wordand then converting to the format of destination. It also converts the exponent to the width and bias ofthe destination format.If the value is too large for the destination format, the instruction sets the overflow exception (OE) bitof the x87 status word.
Then, if the overflow exception is unmasked (OM bit cleared to 0 in the x87control word), the instruction does not perform the store.If the value is a denormal value, the instruction sets the underflow exception (UE) bit in the x87 statusword.If the value is ±0, ±∞, or a NaN, the instruction truncates the least significant bits of the significand andexponent to fit the destination location.MnemonicOpcodeDescriptionFST ST(i)DD D0+iCopy the contents of ST(0) to ST(i).FST mem32realD9 /2Copy the contents of ST(0) to mem32real.FST mem64realDD /2Copy the contents of ST(0) to mem64real.FSTP ST(i)DD D8+iCopy the contents of ST(0) to ST(i) and pop the x87 register stack.FSTP mem32realD9 /3Copy the contents of ST(0) to mem32real and pop the x87 register stackFSTP mem64realDD /3Copy the contents of ST(0) to mem64real and pop the x87 register stack.FSTP mem80realDB /7Copy the contents of ST(0) to mem80real and pop the x87 register stack.Related InstructionsFFREE, FLD, FILD, FIST, FISTP, FBLD, FBSTPrFLAGS AffectedNone302FSTxInstruction Reference26569—Rev.
3.08—July 2007AMD64 Technologyx87 Condition Codex87 Condition CodeValueC0UDescription0x87 stack underflow, if an x87 register stack fault was detected.1x87 stack overflow, if an x87 register stack fault was detected.0Result was rounded down, if a precision exception was detected.1Result was rounded up, if a precision exception was detected.C1C2UC3UNote: A flag set to 1 or cleared to 0 is M (modified). Unaffected flags are blank.
Undefined flags are U.ExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPCause of ExceptionPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.XXAn unmasked x87 floating-point exception was pending.x87 floating-pointexception pending,#MFXx87 Floating-Point Exception Generated, #MFInvalid-operationexception (IE)XXXA source operand was an SNaN value or an unsupportedformat.XXXAn x87 stack underflow occurred.XXXAn x87 stack overflow occurred.Overflow exception(OE)XXXA rounded result was too large to fit into the format of thedestination operand.Underflow exception(UE)XXXA rounded result was too small to fit into the format of thedestination operand.Precision exception(PE)XXXA result could not be represented exactly in thedestination format.Invalid-operationexception (IE) withstack fault (SF)Instruction ReferenceFSTx303AMD64 Technology26569—Rev.
3.08—July 2007FSTCW(FNSTCW)Floating-Point Store Control WordStores the x87 control word in the specified 2-byte memory location. The FNSTCW instruction doesnot check for possible floating-point exceptions before copying the image of the x87 status register.Assemblers usually provide an FSTCW macro that expands into the instruction sequence:WAITFNSTCW destination; Opcode 9B; Opcode D9 /7The WAIT (9Bh) instruction checks for pending x87 exception and calls an exception handler, ifnecessary. The FNSTCW instruction then stores the state of the x87 control register to the desireddestination.MnemonicOpcodeDescriptionFSTCW mem2env9B D9 /7Perform a WAIT (9B) to check for pending floating-pointexceptions, then copy the x87 control word to mem2env.FNSTCW mem2envD9 /7Copy the x87 control word to mem2env without checking forfloating-point exceptions.Related InstructionsFSTSW, FNSTSW, FSTENV, FNSTENVrFLAGS AffectedNonex87 Condition Codex87 Condition CodeValueC0UC1UC2UC3UDescriptionNote: A flag set to 1 or cleared to 0 is M (modified).
Unaffected flags are blank. Undefined flags are U.304FSTCW (FNSTCW)Instruction Reference26569—Rev. 3.08—July 2007AMD64 TechnologyExceptionsVirtual8086 ProtectedExceptionRealDevice not available,#NMXXXThe emulate bit (EM) or the task switch bit (TS) of thecontrol register (CR0) was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limit orwas non-canonical.XXXA memory address exceeded a data segment limit or wasnon-canonical.XThe destination operand was in a nonwritable segment.XA null data segment was used to reference memory.General protection,#GPCause of ExceptionPage fault, #PFXXA page fault resulted from the execution of the instruction.Alignment check,#ACXXAn unaligned memory reference was performed whilealignment checking was enabled.Instruction ReferenceFSTCW (FNSTCW)305AMD64 Technology26569—Rev.
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