Volume 3A System Programming Guide_ Part 1 (794103), страница 96

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3 9-23PROCESSOR MANAGEMENT AND INITIALIZATION28293031323334353637383940414243444546474849505152535455565758596061626364656667686970; RAM_START will contain the linear address of the first; free byte above the copied tables - this may be useful if; a memory manager is used.TSS_INDEXEQU10; TSS_INDEX is the index of the; run after startupTSS of thefirst task to;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ------------------------- STRUCTURES and EQU --------------; structures for system data; TSS structureTASK_STATE STRUClinkDW ?link_hDW ?ESP0DD ?SS0DW ?SS0_hDW ?ESP1DD ?SS1DW ?SS1_hDW ?ESP2DD ?SS2DW ?SS2_hDW ?CR3_reg DD ?EIP_reg DD ?EFLAGS_regDD ?EAX_reg DD ?ECX_reg DD ?EDX_reg DD ?EBX_reg DD ?ESP_reg DD ?EBP_reg DD ?ESI_reg DD ?EDI_reg DD ?ES_regDW ?ES_hDW ?CS_regDW ?CS_hDW ?9-24 Vol.

3PROCESSOR MANAGEMENT AND INITIALIZATION7172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113SS_regDW ?SS_hDW ?DS_regDW ?DS_hDW ?FS_regDW ?FS_hDW ?GS_regDW ?GS_hDW ?LDT_reg DW ?LDT_hDW ?TRAP_reg DW ?IO_map_baseDW ?TASK_STATE ENDS; basic structure of a descriptorDESCSTRUClim_0_15 DW ?bas_0_15 DW ?bas_16_23 DB ?accessDB ?granDB ?bas_24_31 DB ?DESCENDS; structure for use with LGDT and LIDT instructionsTABLE_REGSTRUCtable_lim DW ?table_linearDD ?TABLE_REGENDS; offset of GDT and IDT descriptors in builder generated GDTGDT_DESC_OFFEQU 1*SIZE(DESC)IDT_DESC_OFFEQU 2*SIZE(DESC); equates for building temporary GDT in RAMLINEAR_SELEQU1*SIZE (DESC)LINEAR_PROTO_LOEQU00000FFFFH ; LINEAR_ALIASLINEAR_PROTO_HIEQU000CF9200H; Protection Enable Bit in CR0PE_BIT EQU 1B; ------------------------------------------------------------Vol.

3 9-25PROCESSOR MANAGEMENT AND INITIALIZATION114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158; ------------------------- DATA SEGMENT---------------------; Initially, this data segment starts at linear 0, according; to the processor’s power-up state.STARTUP_DATASEGMENT RWfree_mem_linear_baseLABELDWORDTEMP_GDTLABELBYTE ; must be first in segmentTEMP_GDT_NULL_DESCDESC<>TEMP_GDT_LINEAR_DESC DESC<>; scratch areas for LGDT andTEMP_GDT_SCRATCH TABLE_REGAPP_GDT_RAMTABLE_REGAPP_IDT_RAMTABLE_REG; align end_datafillDW?LIDT instructions<><><>; last thing in this segment - should be on a dword boundaryend_dataLABELBYTESTARTUP_DATAENDS; ------------------------------------------------------------; ------------------------- CODE SEGMENT---------------------STARTUP_CODE SEGMENT ER PUBLIC USE16; filled in by builderPUBLIC GDT_EPROMGDT_EPROMTABLE_REG<>; filled in by builderPUBLIC IDT_EPROMIDT_EPROMTABLE_REG<>; entry point into startup code - the bootstrap will vector; here with a near JMP generated by the builder.This; label must be in the top 64K of linear memory.PUBLICSTARTUP:9-26 Vol.

3STARTUPPROCESSOR MANAGEMENT AND INITIALIZATION159160161162163164165166167168169170171172173174175176177178; DS,ES address the bottom 64K of flat linear memoryASSUME DS:STARTUP_DATA, ES:STARTUP_DATA; See Figure 9-4; load GDTR with temporary GDTLEAEBX,TEMP_GDT ; build the TEMP_GDT in low ram,MOVDWORD PTR [EBX],0; where we can addressMOVDWORD PTR [EBX]+4,0MOVDWORD PTR [EBX]+8, LINEAR_PROTO_LOMOVDWORD PTR [EBX]+12, LINEAR_PROTO_HIMOVTEMP_GDT_scratch.table_linear,EBXMOVTEMP_GDT_scratch.table_lim,15179180181182183184185186187188189190191192193194195196197198199200; clear prefetch queueJMPCLEAR_LABELCLEAR_LABEL:DB 66H; execute a 32 bit LGDTLGDTTEMP_GDT_scratch; enter protected modeMOVEBX,CR0OREBX,PE_BITMOVCR0,EBX; make DS and ES address 4G of linear memoryMOVCX,LINEAR_SELMOVDS,CXMOVES,CX; do board specific initialization;;; ......;; See Figure 9-5; copy EPROM GDT to ram at:;RAM_START + size (STARTUP_DATA)MOVEAX,RAM_STARTADDEAX,OFFSET (end_data)MOVEBX,RAM_STARTVol.

3 9-27PROCESSOR MANAGEMENT AND INITIALIZATION2012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442459-28 Vol. 3MOVADDMOVMOVMOVZXMOVINCMOVMOVADDREP MOVS; fixupMOVMOVRORMOVMOVECX, CS_BASEECX, OFFSET (GDT_EPROM)ESI, [ECX].table_linearEDI,EAXECX, [ECX].table_limAPP_GDT_ram[EBX].table_lim,CXECXEDX,EAXAPP_GDT_ram[EBX].table_linear,EAXEAX,ECXBYTE PTR ES:[EDI],BYTE PTR DS:[ESI]GDT base in descriptorECX,EDX[EDX].bas_0_15+GDT_DESC_OFF,CXECX,16[EDX].bas_16_23+GDT_DESC_OFF,CL[EDX].bas_24_31+GDT_DESC_OFF,CH; copy EPROM IDT to ram at:; RAM_START+size(STARTUP_DATA)+SIZE (EPROM GDT)MOVECX, CS_BASEADDECX, OFFSET (IDT_EPROM)MOVESI, [ECX].table_linearMOVEDI,EAXMOVZXECX, [ECX].table_limMOVAPP_IDT_ram[EBX].table_lim,CXINCECXMOVAPP_IDT_ram[EBX].table_linear,EAXMOVEBX,EAXADDEAX,ECXREP MOVSBYTE PTR ES:[EDI],BYTE PTR DS:[ESI]MOVRORMOVMOVMOVLGDTLIDT; fixup IDT pointer in GDT[EDX].bas_0_15+IDT_DESC_OFF,BXEBX,16[EDX].bas_16_23+IDT_DESC_OFF,BL[EDX].bas_24_31+IDT_DESC_OFF,BH; load GDTR and IDTREBX,RAM_STARTDB66H; execute a 32 bit LGDTAPP_GDT_ram[EBX]DB66H; execute a 32 bit LIDTAPP_IDT_ram[EBX]PROCESSOR MANAGEMENT AND INITIALIZATION246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288MOVMOVMOVMOVMOVMOVROLMOVMOVLSLINCMOVADDREP MOVS; move the TSSEDI,EAXEBX,TSS_INDEX*SIZE(DESC)ECX,GDT_DESC_OFF ;build linear address for TSSGS,CXDH,GS:[EBX].bas_24_31DL,GS:[EBX].bas_16_23EDX,16DX,GS:[EBX].bas_0_15ESI,EDXECX,EBXECXEDX,EAXEAX,ECXBYTE PTR ES:[EDI],BYTE PTR DS:[ESI]MOVROLMOVMOVROL;save startMOV; fixup TSS pointerGS:[EBX].bas_0_15,DXEDX,16GS:[EBX].bas_24_31,DHGS:[EBX].bas_16_23,DLEDX,16of free ram at linear location RAMSTARTfree_mem_linear_base+RAM_START,EAX;assume no LDT used in the initial task - if necessary,;code to move the LDT could be added, and should resemble;that used to move the TSS; load task registerLTRBX; No task switch, only descriptor loading; See Figure 9-6; load minimal set of registers necessary to simulate task; switchMOVMOVMOVMOVPUSHPUSHAX,[EDX].SS_reg; start loading registersEDI,[EDX].ESP_regSS,AXESP,EDI; stack now validDWORD PTR [EDX].EFLAGS_regDWORD PTR [EDX].CS_regVol.

3 9-29PROCESSOR MANAGEMENT AND INITIALIZATION289PUSHDWORD PTR [EDX].EIP_reg290MOVAX,[EDX].DS_reg291MOVBX,[EDX].ES_reg292MOVDS,AX; DS and ES no longer linear memory293MOVES,BX294295; simulate far jump to initial task296IRETD297298 STARTUP_CODE ENDS*** WARNING #377 IN 298, (PASS 2) SEGMENT CONTAINS PRIVILEGEDINSTRUCTION(S)299300 END STARTUP, DS:STARTUP_DATA, SS:STARTUP_DATA301302ASSEMBLY COMPLETE,9-30 Vol. 31 WARNING,NO ERRORS.PROCESSOR MANAGEMENT AND INITIALIZATIONFFFF FFFFHSTART: [CS.BASE+EIP]FFFF 0000H• Jump near start• Construct TEMP_GDT• LGDT• Move to protected modeDS, ES = GDT[1]4 GBBaseLimitGDT [1]GDT [0]Base=0, Limit=4G0GDT_SCRATCHTEMP_GDTFigure 9-4. Constructing Temporary GDT and Switching to Protected Mode (Lines162-172 of List File)Vol.

3 9-31PROCESSOR MANAGEMENT AND INITIALIZATIONFFFF FFFFHTSSIDTGDT• Move the GDT, IDT, TSSfrom ROM to RAM• Fix Aliases• LTRTSS RAMIDT RAMGDT RAMRAM_START0Figure 9-5. Moving the GDT, IDT, and TSS from ROM to RAM (Lines 196-261 of ListFile)9-32 Vol. 3PROCESSOR MANAGEMENT AND INITIALIZATIONSS = TSS.SSESP = TSS.ESPPUSH TSS.EFLAGPUSH TSS.CSPUSH TSS.EIPES = TSS.ESDS = TSS.DSIRET••EIPEFLAGS•••ESP•ESCSSSDSGDTIDT AliasGDT Alias0TSS RAMIDT RAMGDT RAMRAM_STARTFigure 9-6.

Task Switching (Lines 282-296 of List File)9.10.3MAIN.ASM Source CodeThe file MAIN.ASM shown in Example 9-2 defines the data and stack segments forthis application and can be substituted with the main module task written in a highlevel language that is invoked by the IRET instruction executed by STARTUP.ASM.Example 9-2. MAIN.ASMNAMEmain_moduledataSEGMENT RWdw 1000 dup(?)DATAENDSstack stackseg 800Vol. 3 9-33PROCESSOR MANAGEMENT AND INITIALIZATIONCODE SEGMENT ER use32 PUBLICmain_start:nopnopnopCODE ENDSEND main_start, ds:data, ss:stack9.10.4Supporting FilesThe batch file shown in Example 9-3 can be used to assemble the source code filesSTARTUP.ASM and MAIN.ASM and build the final application.Example 9-3.

Batch File to Assemble and Build the ApplicationASM386 STARTUP.ASMASM386 MAIN.ASMBLD386 STARTUP.OBJ, MAIN.OBJ buildfile(EPROM.BLD) bootstrap(STARTUP)BootloadBLD386 performs several operations in this example:It allocates physical memory location to segments and tables.It generates tables using the build file and the input files.It links object files and resolves references.It generates a boot-loadable file to be programmed into the EPROM.Example 9-4 shows the build file used as an input to BLD386 to perform the abovefunctions.Example 9-4. Build FileINIT_BLD_EXAMPLE;SEGMENT,;*SEGMENTS(DPL = 0)startup.startup_code(BASE = 0FFFF0000H)TASKBOOT_TASK(OBJECT = startup, INITIAL,DPL = 0,NOT INTENABLED)PROTECTED_MODE_TASK(OBJECT = main_module,DPL = 0,NOT INTENABLED),;9-34 Vol. 3PROCESSOR MANAGEMENT AND INITIALIZATIONTABLEGDT (LOCATION = GDT_EPROM,ENTRY = (10:PROTECTED_MODE_TASK,startup.startup_code,startup.startup_data,main_module.data,main_module.code,main_module.stack)),IDT (LOCATION = IDT_EPROM);MEMORY(,,,);RESERVE = (0..3FFFH-- Area for the GDT, IDT, TSS copied from ROM60000H..0FFFEFFFFH)RANGE = (ROM_AREA = ROM (0FFFF0000H..0FFFFFFFFH))-- Eprom size 64KRANGE = (RAM_AREA = RAM (4000H..05FFFFH))ENDTable 9-5 shows the relationship of each build item with an ASM source file.Table 9-5.

Relationship Between BLD Item and ASM Source FileItemASM386 andStartup.A58BLD386 Controlsand BLD fileEffectBootstrappublic startupstartup:bootstrapstart(startup)Near jump at 0FFFFFFF0Hto start.GDT locationpublic GDT_EPROMGDT_EPROM TABLE_REG <>TABLEGDT(location = GDT_EPROM)The location of the GDTwill be programmed intothe GDT_EPROM location.IDT locationpublic IDT_EPROMIDT_EPROM TABLE_REG <>TABLEIDT(location = IDT_EPROMThe location of the IDTwill be programmed intothe IDT_EPROM location.Vol. 3 9-35PROCESSOR MANAGEMENT AND INITIALIZATIONTable 9-5. Relationship Between BLD Item and ASM Source File (Contd.)ItemASM386 andStartup.A58BLD386 Controlsand BLD fileEffectRAM startRAM_START equ 400Hmemory (reserve = (0..3FFFH))RAM_START is used asthe ram destination formoving the tables.

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