Volume 2A Instruction Set Reference A-M (794101), страница 48
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Example of Cache and TLB InterpretationThe first member of the family of Pentium 4 processors returns the following information about caches and TLBs when the CPUID executes with an input value of 2:3-220 Vol. 2ACPUID—CPU IdentificationINSTRUCTION SET REFERENCE, A-MEAXEBXECXEDX66 5B 50 01H0H0H00 7A 70 00HWhich means:•The least-significant byte (byte 0) of register EAX is set to 01H. This indicatesthat CPUID needs to be executed once with an input value of 2 to retrievecomplete information about caches and TLBs.•The most-significant bit of all four registers (EAX, EBX, ECX, and EDX) is set to 0,indicating that each register contains valid 1-byte descriptors.•Bytes 1, 2, and 3 of register EAX indicate that the processor has:— 50H - a 64-entry instruction TLB, for mapping 4-KByte and 2-MByte or 4MByte pages.— 5BH - a 64-entry data TLB, for mapping 4-KByte and 4-MByte pages.— 66H - an 8-KByte 1st level data cache, 4-way set associative, with a 64-Bytecache line size.••The descriptors in registers EBX and ECX are valid, but contain NULL descriptors.Bytes 0, 1, 2, and 3 of register EDX indicate that the processor has:— 00H - NULL descriptor.— 70H - Trace cache: 12 K-μop, 8-way set associative.— 7AH - a 256-KByte 2nd level cache, 8-way set associative, with a sectored,64-byte cache line size.— 00H - NULL descriptor.INPUT EAX = 04H: Returns Deterministic Cache Parameters for Each LevelWhen CPUID executes with EAX set to 04H and ECX contains an index value, theprocessor returns encoded data that describe a set of deterministic cache parameters (for the cache level associated with the input in ECX).
Valid index values startfrom 0.Software can enumerate the deterministic cache parameters for each level of thecache hierarchy starting with an index value of 0, until the parameters report thevalue associated with the cache type field is 0. The architecturally defined fieldsreported by deterministic cache parameters are documented in Table 3-12.This Cache Size in Bytes= (Ways + 1) * (Partitions + 1) * (Line_Size + 1) * (Sets + 1)= (EBX[31:22] + 1) * (EBX[21:12] + 1) * (EBX[11:0] + 1) * (EXC + 1)CPUID—CPU IdentificationVol.
2A 3-221INSTRUCTION SET REFERENCE, A-MThe CPUID leaf 04H also reports data that can be used to derive the topology ofprocessor cores in a physical package. This information is constant for all valid indexvalues. Software can query the raw data reported by executing CPUID with EAX=04Hand ECX=0 and use it as part of the topology enumeration algorithm described inChapter 8, “Multiple-Processor Management,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A.INPUT EAX = 05H: Returns MONITOR and MWAIT FeaturesWhen CPUID executes with EAX set to 05H, the processor returns information aboutfeatures available to MONITOR/MWAIT instructions.
The MONITOR instruction is usedfor address-range monitoring in conjunction with MWAIT instruction. The MWAITinstruction optionally provides additional extensions for advanced power management. See Table 3-12.INPUT EAX = 06H: Returns Thermal and Power Management FeaturesWhen CPUID executes with EAX set to 06H, the processor returns information aboutthermal and power management features.
See Table 3-12.INPUT EAX = 09H: Returns Direct Cache Access InformationWhen CPUID executes with EAX set to 09H, the processor returns information aboutDirect Cache Access capabilities. See Table 3-12.INPUT EAX = 0AH: Returns Architectural Performance Monitoring FeaturesWhen CPUID executes with EAX set to 0AH, the processor returns information aboutsupport for architectural performance monitoring capabilities. Architectural performance monitoring is supported if the version ID (see Table 3-12) is greater thanPn 0. See Table 3-12.For each version of architectural performance monitoring capability, software mustenumerate this leaf to discover the programming facilities and the architecturalperformance events available in the processor.
The details are described in Chapter20, “Introduction to Virtual-Machine Extensions,” in the Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 3B.INPUT EAX = 0BH: Returns Extended Topology InformationWhen CPUID executes with EAX set to 0BH, the processor returns information aboutextended topology enumeration data. Software must detect the presence of CPUIDleaf 0BH by verifying (a) the highest leaf index supported by CPUID is >= 0BH, and(b) CPUID.0BH:EBX[15:0] reports a non-zero value. See Table 3-12.INPUT EAX = 0DH: Returns Processor Extended States Enumeration InformationWhen CPUID executes with EAX set to 0DH and ECX = 0, the processor returns information about the bit-vector representation of all processor state extensions that are3-222 Vol.
2ACPUID—CPU IdentificationINSTRUCTION SET REFERENCE, A-Msupported in the processor and storage size requirements of the XSAVE/XRSTORarea. See Table 3-12.When CPUID executes with EAX set to 0DH and ECX = n (n > 1, and is a valid subleaf index), the processor returns information about the size and offset of eachprocessor extended state save area within the XSAVE/XRSTOR area.
See Table 3-12.Software can use the forward-extendable technique depicted below to query thevalid sub-leaves and obtain size and offset information for each processor extendedstate save area:For i = 2 to 62 // sub-leaf 1 is reservedIF (CPUID.(EAX=0DH, ECX=0):VECTOR[i] = 1 ) // VECTOR is the 64-bit value of EDX:EAXExecute CPUID.(EAX=0DH, ECX = i) to examine size and offset for sub-leaf i;FI;METHODS FOR RETURNING BRANDING INFORMATIONUse the following techniques to access branding information:1. Processor brand string method; this method also returns the processor’smaximum operating frequency2. Processor brand index; this method uses a software supplied brand string table.These two methods are discussed in the following sections.
For methods that areavailable in early processors, see Section: “Identification of Earlier IA-32 Processors”in Chapter 14 of the Intel® 64 and IA-32 Architectures Software Developer’s Manual,Volume 1.The Processor Brand String MethodFigure 3-8 describes the algorithm used for detection of the brand string. Processorbrand identification software should execute this algorithm on all Intel 64 and IA-32processors.This method (introduced with Pentium 4 processors) returns an ASCII brand identification string and the maximum operating frequency of the processor to the EAX,EBX, ECX, and EDX registers.CPUID—CPU IdentificationVol.
2A 3-223INSTRUCTION SET REFERENCE, A-MInput: EAX=0x80000000CPUIDIF (EAX & 0x80000000)CPUIDFunctionSupportedFalseProcessor BrandString NotSupportedTrueProcessor BrandString SupportedTrue ≥ExtendedEAX Return Value =Max. Extended CPUIDFunction IndexIF (EAX Return Value≥ 0x80000004)OM15194Figure 3-8. Determination of Support for the Processor Brand StringHow Brand Strings WorkTo use the brand string method, execute CPUID with EAX input of 8000002H through80000004H. For each input value, CPUID returns 16 ASCII characters using EAX,EBX, ECX, and EDX.
The returned string will be NULL-terminated.Table 3-18 shows the brand string that is returned by the first processor in thePentium 4 processor family.3-224 Vol. 2ACPUID—CPU IdentificationINSTRUCTION SET REFERENCE, A-MTable 3-18. Processor Brand String Returned with Pentium 4 ProcessorEAX Input Value80000002H80000003H80000004HReturn ValuesASCII EquivalentEAX = 20202020H“”EBX = 20202020H“ ”ECX = 20202020H“ ”EDX = 6E492020H“nI ”EAX = 286C6574H“(let”EBX = 50202952H“P )R”ECX = 69746E65H“itne”EDX = 52286D75H“R(mu”EAX = 20342029H“ 4 )”EBX = 20555043H“ UPC”ECX = 30303531H“0051”EDX = 007A484DH“\0zHM”Extracting the Maximum Processor Frequency from Brand StringsFigure 3-9 provides an algorithm which software can use to extract the maximumprocessor operating frequency from the processor brand string.NOTEWhen a frequency is given in a brand string, it is the maximumqualified frequency of the processor, not the frequency at which theprocessor is currently running.CPUID—CPU IdentificationVol.
2A 3-225INSTRUCTION SET REFERENCE, A-M6FDQ%UDQG6WULQJLQ5HYHUVH%\WH2UGHU]+0RU0DWFK]+*RU6XEVWULQJ]+7)DOVH,)6XEVWULQJ0DWFKHG'HWHUPLQH)UHTDQG0XOWLSOLHU,I]+07UXH,I]+*'HWHUPLQH0XOWLSOLHU,I]+76FDQ'LJLWV8QWLO%ODQN'HWHUPLQH)UHT,Q5HYHUVH2UGHU0D[4XDOLILHG)UHTXHQF\)UHT[0XOWLSOLHU5HSRUW(UURU0XOWLSOLHU [0XOWLSOLHU [0XOWLSOLHU [5HYHUVH'LJLWV7R'HFLPDO9DOXH)UHT ;<=LI'LJLWV =<;20Figure 3-9. Algorithm for Extracting Maximum Processor FrequencyThe Processor Brand Index MethodThe brand index method (introduced with Pentium® III Xeon® processors) providesan entry point into a brand identification table that is maintained in memory bysystem software and is accessible from system- and user-level code.
In this table,each brand index is associate with an ASCII brand identification string that identifiesthe official Intel family and model number of a processor.When CPUID executes with EAX set to 1, the processor returns a brand index to thelow byte in EBX. Software can then use this index to locate the brand identificationstring for the processor in the brand identification table.
The first entry (brand index0) in this table is reserved, allowing for backward compatibility with processors that3-226 Vol. 2ACPUID—CPU IdentificationINSTRUCTION SET REFERENCE, A-Mdo not support the brand identification feature. Starting with processor signaturefamily ID = 0FH, model = 03H, brand index method is no longer supported. Usebrand string method instead.Table 3-19 shows brand indices that have identification strings associated with them.Table 3-19.