Volume 2A Instruction Set Reference A-M (794101), страница 18
Текст из файла (страница 18)
(cross reference).NOTES••3.1.1.4The letters in the Op/En column of an instruction apply ONLY tothe encoding definition table immediately following theinstruction summary table.In the encoding definition table, the letter ‘r’ within a pair ofparenthesis denotes the content of the operand will be read bythe processor. The letter ‘w’ within a pair of parenthesis denotesthe content of the operand will be updated by the processor.64-bit Mode Column in the Instruction Summary TableThe “64-bit Mode” column indicates whether the opcode sequence is supported in64-bit mode. The column uses the following notation:•••Valid — Supported.•N.P.
— Indicates the REX prefix does not affect the legacy instruction in 64-bitmode.••N.I. — Indicates the opcode is treated as a new instruction in 64-bit mode.Invalid — Not supported.N.E. — Indicates an instruction syntax is not encodable in 64-bit mode (it mayrepresent part of a sequence of valid instructions in other modes).N.S. — Indicates an instruction syntax that requires an address override prefix in64-bit mode and is not supported.
Using an address override prefix in 64-bitmode may result in model-specific execution behavior.3.1.1.5Compatibility/Legacy Mode Column in the Instruction SummaryTableThe “Compatibility/Legacy Mode” column provides information on the opcodesequence in either the compatibility mode or other IA-32 modes. The column usesthe following notation:••Valid — Supported.Invalid — Not supported.Vol. 2A 3-7INSTRUCTION SET REFERENCE, A-M•N.E. — Indicates an Intel 64 instruction mnemonics/syntax that is notencodable; the opcode sequence is not applicable as an individual instruction incompatibility mode or IA-32 mode.
The opcode may represent a valid sequenceof legacy IA-32 instructions.3.1.1.6Description Column in the Instruction Summary TableThe “Description” column briefly explains forms of the instruction.3.1.1.7Description SectionEach instruction is then described by number of information sections. The “Description” section describes the purpose of the instructions and required operands in moredetail.3.1.1.8Operation SectionThe “Operation” section contains an algorithm description (frequently written inpseudo-code) for the instruction. Algorithms are composed of the followingelements:••Comments are enclosed within the symbol pairs “(*” and “*)”.•A register name implies the contents of the register. A register name enclosed inbrackets implies the contents of the location whose address is contained in thatregister.
For example, ES:[DI] indicates the contents of the location whose ESsegment relative address is in register DI. [SI] indicates the contents of theaddress contained in register SI relative to the SI register’s default segment (DS)or the overridden segment.•Parentheses around the “E” in a general-purpose register name, such as (E)SI,indicates that the offset is read from the SI register if the address-size attributeis 16, from the ESI register if the address-size attribute is 32. Parenthesesaround the “R” in a general-purpose register name, (R)SI, in the presence of a64-bit register definition such as (R)SI, indicates that the offset is read from the64-bit RSI register if the address-size attribute is 64.•Brackets are used for memory operands where they mean that the contents ofthe memory location is a segment-relative offset.
For example, [SRC] indicatesthat the content of the source operand is a segment-relative offset.••A ← B indicates that the value of B is assigned to A.Compound statements are enclosed in keywords, such as: IF, THEN, ELSE and FIfor an if statement; DO and OD for a do statement; or CASE... OF for a casestatement.The symbols =, ≠, >, <, ≥, and ≤ are relational operators used to compare twovalues: meaning equal, not equal, greater or equal, less or equal, respectively. Arelational expression such as A ← B is TRUE if the value of A is equal to B;otherwise it is FALSE.3-8 Vol. 2AINSTRUCTION SET REFERENCE, A-M•The expression “<< COUNT” and “>> COUNT” indicates that the destinationoperand should be shifted left or right by the number of bits indicated by thecount operand.The following identifiers are used in the algorithmic descriptions:•OperandSize and AddressSize — The OperandSize identifier represents theoperand-size attribute of the instruction, which is 16, 32 or 64-bits.
TheAddressSize identifier represents the address-size attribute, which is 16, 32 or64-bits. For example, the following pseudo-code indicates that the operand-sizeattribute depends on the form of the MOV instruction used.IF Instruction ← MOVWTHEN OperandSize ← 16;ELSEIF Instruction ← MOVDTHEN OperandSize ← 32;ELSEIF Instruction ← MOVQTHEN OperandSize ← 64;FI;FI;FI;See “Operand-Size and Address-Size Attributes” in Chapter 3 of the Intel® 64and IA-32 Architectures Software Developer’s Manual, Volume 1, for guidelineson how these attributes are determined.•StackAddrSize — Represents the stack address-size attribute associated withthe instruction, which has a value of 16, 32 or 64-bits.
See “Address-SizeAttribute for Stack” in Chapter 6, “Procedure Calls, Interrupts, and Exceptions,” ofthe Intel® 64 and IA-32 Architectures Software Developer’s Manual, Volume 1.••SRC — Represents the source operand.DEST — Represents the destination operand.The following functions are used in the algorithmic descriptions:•ZeroExtend(value) — Returns a value zero-extended to the operand-sizeattribute of the instruction. For example, if the operand-size attribute is 32, zeroextending a byte value of –10 converts the byte from F6H to a doubleword valueof 000000F6H. If the value passed to the ZeroExtend function and the operandsize attribute are the same size, ZeroExtend returns the value unaltered.•SignExtend(value) — Returns a value sign-extended to the operand-sizeattribute of the instruction. For example, if the operand-size attribute is 32, signextending a byte containing the value –10 converts the byte from F6H to adoubleword value of FFFFFFF6H.
If the value passed to the SignExtend functionand the operand-size attribute are the same size, SignExtend returns the valueunaltered.Vol. 2A 3-9INSTRUCTION SET REFERENCE, A-M•SaturateSignedWordToSignedByte — Converts a signed 16-bit value to asigned 8-bit value. If the signed 16-bit value is less than –128, it is representedby the saturated value -128 (80H); if it is greater than 127, it is represented bythe saturated value 127 (7FH).•SaturateSignedDwordToSignedWord — Converts a signed 32-bit value to asigned 16-bit value. If the signed 32-bit value is less than –32768, it isrepresented by the saturated value –32768 (8000H); if it is greater than 32767,it is represented by the saturated value 32767 (7FFFH).•SaturateSignedWordToUnsignedByte — Converts a signed 16-bit value to anunsigned 8-bit value.
If the signed 16-bit value is less than zero, it is representedby the saturated value zero (00H); if it is greater than 255, it is represented bythe saturated value 255 (FFH).•SaturateToSignedByte — Represents the result of an operation as a signed8-bit value. If the result is less than –128, it is represented by the saturated value–128 (80H); if it is greater than 127, it is represented by the saturated value 127(7FH).•SaturateToSignedWord — Represents the result of an operation as a signed16-bit value. If the result is less than –32768, it is represented by the saturatedvalue –32768 (8000H); if it is greater than 32767, it is represented by thesaturated value 32767 (7FFFH).•SaturateToUnsignedByte — Represents the result of an operation as a signed8-bit value.
If the result is less than zero it is represented by the saturated valuezero (00H); if it is greater than 255, it is represented by the saturated value 255(FFH).•SaturateToUnsignedWord — Represents the result of an operation as a signed16-bit value. If the result is less than zero it is represented by the saturated valuezero (00H); if it is greater than 65535, it is represented by the saturated value65535 (FFFFH).•LowOrderWord(DEST * SRC) — Multiplies a word operand by a word operandand stores the least significant word of the doubleword result in the destinationoperand.•HighOrderWord(DEST * SRC) — Multiplies a word operand by a word operandand stores the most significant word of the doubleword result in the destinationoperand.•Push(value) — Pushes a value onto the stack.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
