Volume 3 General-Purpose and System Instructions (794097), страница 8
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If the limit isexceeded, a general-protection exception occurs.2Instruction Formats24594—Rev. 3.13—July 20071.2AMD64 TechnologyInstruction PrefixesThe instruction prefixes shown in Figure 1-1 on page 1 are of two types: legacy prefixes and REXprefixes. Each of the legacy prefixes has a unique byte value. By contrast, the REX prefixes, whichenable use of the AMD64 register extensions in 64-bit mode, are organized as a group of byte values inwhich the value of the prefix indicates the combination of register-extension features to be enabled.1.2.1 Summary of Legacy PrefixesTable 1-1 on page 4 shows the legacy prefixes—that is, all prefixes except the REX prefixes, which aredescribed on page 11.
The legacy prefixes are organized into five groups, as shown in the left-mostcolumn of Table 1-1. A single instruction should include a maximum of one prefix from each of thefive groups. The legacy prefixes can appear in any order within the position shown in Figure 1-1 forlegacy prefixes. The result of using multiple prefixes from a single group is unpredictable.Some of the restrictions on legacy prefixes are:•••••Operand-Size Override—This prefix affects only general-purpose instructions and a few x87instructions.
When used with 128-bit and 64-bit media instructions, this prefix acts in a specialway to modify the opcode.Address-Size Override—This prefix affects only memory operands.Segment Override—In 64-bit mode, the CS, DS, ES, and SS segment override prefixes are ignored.LOCK Prefix—This prefix is allowed only with certain instructions that modify memory.Repeat Prefixes—These prefixes affect only certain string instructions. When used with 128-bitand 64-bit media instructions, these prefixes act in a special way to modify the opcode.Instruction Formats3AMD64 TechnologyTable 1-1.24594—Rev.
3.13—July 2007Legacy Instruction PrefixesPrefix Group1MnemonicPrefixByte (Hex)DescriptionOperand-Size Override none662Changes the default operand size of a memory orregister operand, as shown in Table 1-2 on page 5.Address-Size Override none673Changes the default address size of a memory operand,as shown in Table 1-3 on page 6.CS2E4Forces use of the current CS segment for memoryoperands.DS3E4Forces use of the current DS segment for memoryoperands.ES264Forces use of the current ES segment for memoryoperands.FS64Forces use of the current FS segment for memoryoperands.GS65Forces use of the current GS segment for memoryoperands.SS364Forces use of the current SS segment for memoryoperands.LOCKF05Causes certain kinds of memory read-modify-writeinstructions to occur atomically.Segment OverrideLockRepeats a string operation (INS, MOVS, OUTS, LODS,and STOS) until the rCX register equals 0.REPRepeatREPE orREPZREPNE orREPNZF36F26Repeats a compare-string or scan-string operation(CMPSx and SCASx) until the rCX register equals 0 orthe zero flag (ZF) is cleared to 0.Repeats a compare-string or scan-string operation(CMPSx and SCASx) until the rCX register equals 0 orthe zero flag (ZF) is set to 1.Note:1.
A single instruction should include a maximum of one prefix from each of the five groups.2. When used with 128-bit and 64-bit media instructions, this prefix acts in a special way to modify the opcode. Theprefix is ignored by 64-bit media floating-point (3DNow!™) instructions.
See “Instructions that Cannot Use the Operand-Size Prefix” on page 5.3. This prefix also changes the size of the RCX register when used as an implied count register.4. In 64-bit mode, the CS, DS, ES, and SS segment overrides are ignored.5. The LOCK prefix should not be used for instructions other than those listed in “Lock Prefix” on page 8.6. This prefix should be used only with compare-string and scan-string instructions. When used with 128-bit and 64bit media instructions, the prefix acts in a special way to modify the opcode.1.2.2 Operand-Size Override PrefixThe default operand size for an instruction is determined by a combination of its opcode, the D(default) bit in the current code-segment descriptor, and the current operating mode, as shown inTable 1-2.
The operand-size override prefix (66h) selects the non-default operand size. The prefix can4Instruction Formats24594—Rev. 3.13—July 2007AMD64 Technologybe used with any general-purpose instruction that accesses non-fixed-size operands in memory orgeneral-purpose registers (GPRs), and it can also be used with the x87 FLDENV, FNSTENV,FNSAVE, and FRSTOR instructions.In 64-bit mode, the prefix allows mixing of 16-bit, 32-bit, and 64-bit data on an instruction-byinstruction basis. In compatibility and legacy modes, the prefix allows mixing of 16-bit and 32-bitoperands on an instruction-by-instruction basis.Table 1-2.Operand-Size OverridesOperating Mode64-BitModeLongModeDefaultOperandSize (Bits)32232CompatibilityMode16Legacy Mode(Protected, Virtual-8086,or Real Mode)3216EffectiveOperandSize(Bits)Instruction Prefix166hREX.W364don’t careyes32nono16yesno32no16yes32yes16no32no16yes32yes16noNot ApplicableNote:1.
A “no’ indicates that the default operand size is used.2. This is the typical default, although some instructions default to other operandsizes. See Appendix B, “General-Purpose Instructions in 64-Bit Mode,” for details.3. See “REX Prefixes” on page 11.In 64-bit mode, most instructions default to a 32-bit operand size. For these instructions, a REX prefix(page 13) can specify a 64-bit operand size, and a 66h prefix specifies a 16-bit operand size.
The REXprefix takes precedence over the 66h prefix. However, if an instruction defaults to a 64-bit operandsize, it does not need a REX prefix and it can only be overridden to a 16-bit operand size. It cannot beoverridden to a 32-bit operand size, because there is no 32-bit operand-size override prefix in 64-bitmode. Two groups of instructions have a default 64-bit operand size in 64-bit mode:••Near branches. For details, see “Near Branches in 64-Bit Mode” in Volume 1.All instructions, except far branches, that implicitly reference the RSP.
For details, see “StackOperation” in Volume 1.Instructions that Cannot Use the Operand-Size Prefix. The operand-size prefix should be usedonly with general-purpose instructions and the x87 FLDENV, FNSTENV, FNSAVE, and FRSTORInstruction Formats5AMD64 Technology24594—Rev. 3.13—July 2007instructions, in which the prefix selects between 16-bit and 32-bit operand size. The prefix is ignoredby all other x87 instructions and by 64-bit media floating-point (3DNow!™) instructions.When used with 64-bit media integer instructions, the 66h prefix acts in a special way to modify theopcode.
This modification typically causes an access to an XMM register or 128-bit memory operandand thereby converts the 64-bit media instruction into its comparable 128-bit media instruction. Theresult of using an F2h or F3h repeat prefix along with a 66h prefix in 128-bit or 64-bit mediainstructions is unpredictable.Operand-Size and REX Prefixes. The REX operand-size prefix takes precedence over the 66hprefix. See “REX.W: Operand Width” on page 13 for details.1.2.3 Address-Size Override PrefixThe default address size for instructions that access non-stack memory is determined by the currentoperating mode, as shown in Table 1-3. The address-size override prefix (67h) selects the non-defaultaddress size. Depending on the operating mode, this prefix allows mixing of 16-bit and 32-bit, or of32-bit and 64-bit addresses, on an instruction-by-instruction basis.
The prefix changes the address sizefor memory operands. It also changes the size of the RCX register for instructions that use RCXimplicitly.For instructions that implicitly access the stack segment (SS), the address size for stack accesses isdetermined by the D (default) bit in the stack-segment descriptor.
In 64-bit mode, the D bit is ignored,and all stack references have a 64-bit address size. However, if an instruction accesses both stack andnon-stack memory, the address size of the non-stack access is determined as shown in Table 1-3.Table 1-3.Address-Size OverridesOperating Mode64-BitModeDefaultAddressSize (Bits)AddressEffectiveSize PrefixAddress Size(67h)1(Bits)Required?6432Long ModeCompatibilityMode16Legacy Mode(Protected, Virtual-8086, or RealMode)321664no32yes32no16yes32yes16no32no16yes32yes16noNote:1. A “no” indicates that the default address size is used.6Instruction Formats24594—Rev.
3.13—July 2007AMD64 TechnologyAs Table 1-3 shows, the default address size is 64 bits in 64-bit mode. The size can be overridden to 32bits, but 16-bit addresses are not supported in 64-bit mode. In compatibility and legacy modes, thedefault address size is 16 bits or 32 bits, depending on the operating mode (see “ProcessorInitialization and Long Mode Activation” in Volume 2 for details). In these modes, the address-sizeprefix selects the non-default size, but the 64-bit address size is not available.Certain instructions reference pointer registers or count registers implicitly, rather than explicitly.
Insuch instructions, the address-size prefix affects the size of such addressing and count registers, just asit does when such registers are explicitly referenced. Table 1-4 lists all such instructions and theregisters referenced using the three possible address sizes.Table 1-4.Pointer and Count Registers and the Address-Size PrefixPointer or Count RegisterInstructionCMPS, CMPSB, CMPSW,CMPSD, CMPSQ—CompareStringsINS, INSB, INSW, INSD—Input String16-BitAddress SizeSI, DI, CX32-BitAddress Size64-BitAddress SizeESI, EDI, ECX RSI, RDI, RCXDI, CXEDI, ECXRDI, RCXCXECXRCXLODS, LODSB, LODSW,LODSD, LODSQ—LoadStringSI, CXESI, ECXRSI, RCXLOOP, LOOPE, LOOPNZ,LOOPNE, LOOPZ—LoopCXECXRCXMOVS, MOVSB, MOVSW,MOVSD, MOVSQ—MoveStringSI, DI, CXOUTS, OUTSB, OUTSW,OUTSD—Output StringSI, CXESI, ECXRSI, RCXCXECXRCXSCAS, SCASB, SCASW,SCASD, SCASQ—ScanStringDI, CXEDI, ECXRDI, RCXSTOS, STOSB, STOSW,STOSD, STOSQ—StoreStringDI, CXEDI, ECXRDI, RCXBXEBXRBXJCXZ, JECXZ, JRCXZ—Jumpon CX/ECX/RCX ZeroREP, REPE, REPNE, REPNZ,REPZ—Repeat PrefixesXLAT, XLATB—Table Look-upTranslationInstruction FormatsESI, EDI, ECX RSI, RDI, RCX7AMD64 Technology24594—Rev.
3.13—July 20071.2.4 Segment-Override PrefixesSegment overrides can be used only with instructions that reference non-stack memory. Mostinstructions that reference memory are encoded with a ModRM byte (page 17). The default segmentfor such memory-referencing instructions is implied by the base register indicated in its ModRM byte,as follows:•••Instructions that Reference a Non-Stack Segment—If an instruction encoding references any baseregister other than rBP or rSP, or if an instruction contains an immediate offset, the default segmentis the data segment (DS). These instructions can use the segment-override prefix to select one ofthe non-default segments, as shown in Table 1-5.String Instructions—String instructions reference two memory operands.
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