Volume 3B System Programming Guide_ Part 2 (794104), страница 85
Текст из файла (страница 85)
30: NBOGUSThe marked μops are not bogus.1: BOGUSThe marked μops are bogus.CCCR Select05HCCCR[15:13]Can Support PEBSYesRequire AdditionalMSRs for taggingSelected ESCRsand/or MSR_TC_PRECISE_EVENTSee list of metrics supported byFront_end tagging in Table A-3PERFORMANCE-MONITORING EVENTSTable A-6. Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersParameter Valueexecution_eventDescriptionThis event counts the retirementof tagged μops, which arespecified through the executiontagging mechanism.The event mask allows from oneto four types of μops to bespecified as either bogus or nonbogus μops to be tagged.ESCR restrictionsMSR_CRU_ESCR2MSR_CRU_ESCR3Counter numbersper ESCRESCR2: 12, 13, 16ESCR Event Select0CHESCR3: 14, 15, 17ESCR[31:25]ESCR[24:9]ESCR Event MaskBitCCCR Select0: NBOGUS0The marked μops are not bogus.1: NBOGUS1The marked μops are not bogus.2: NBOGUS2The marked μops are not bogus.3: NBOGUS3The marked μops are not bogus.4: BOGUS0The marked μops are bogus.5: BOGUS1The marked μops are bogus.6: BOGUS2The marked μops are bogus.7: BOGUS3The marked μops are bogus.05HCCCR[15:13]Event SpecificNotesEach of the 4 slots to specify thebogus/non-bogus μops must becoordinated with the 4 TagValuebits in the ESCR (for example,NBOGUS0 must accompany a ‘1’ inthe lowest bit of the TagValuefield in ESCR, NBOGUS1 mustaccompany a ‘1’ in the next butlowest bit of the TagValue field).Can Support PEBSYesRequire AdditionalMSRs for taggingAn ESCR for anupstream eventSee list of metrics supported byexecution tagging in Table A-4.Vol.
3 A-87PERFORMANCE-MONITORING EVENTSTable A-6. Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersParameter Valuereplay_eventDescriptionThis event counts the retirementof tagged μops, which arespecified through the replaytagging mechanism. The eventmask specifies bogus or non-bogusμops.ESCR restrictionsMSR_CRU_ESCR2MSR_CRU_ESCR3Counter numbersper ESCRESCR2: 12, 13, 16ESCR Event Select09HESCR3: 14, 15, 17ESCR[31:25]ESCR[24:9]ESCR Event MaskBitCCCR Select0: NBOGUSThe marked μops are not bogus.1: BOGUSThe marked μops are bogus.05HCCCR[15:13]Event SpecificNotesSupports counting tagged μopswith additional MSRs.Can Support PEBSYesRequire AdditionalMSRs for taggingIA32_PEBS_ENABLESee list of metrics supported byreplay tagging in Table A-5.MSR_PEBS_MATRIX_VERTSelected ESCRinstr_retiredThis event counts instructions thatare retired during a clock cycle.Mask bits specify bogus or nonbogus (and whether they aretagged using the front-endtagging mechanism).ESCR restrictionsMSR_CRU_ESCR0MSR_CRU_ESCR1A-88 Vol.
3Counter numbersper ESCRESCR0: 12, 13, 16ESCR Event Select02HESCR1: 14, 15, 17ESCR[31:25]PERFORMANCE-MONITORING EVENTSTable A-6. Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersParameter ValueDescriptionESCR[24:9]ESCR Event MaskBitCCCR Select0: NBOGUSNTAGNon-bogus instructions that arenot tagged.1: NBOGUSTAGNon-bogus instructions that aretagged.2: BOGUSNTAGBogus instructions that are nottagged.3: BOGUSTAGBogus instructions that aretagged.04HCCCR[15:13]Event SpecificNotes1: The event count may varydepending on themicroarchitectural states of theprocessor when the eventdetection is enabled.2: The event may count morethan once for some instructionswith complex uop flows andwere interrupted beforeretirement.Can Support PEBSNouops_retiredThis event counts μops that areretired during a clock cycle.
Maskbits specify bogus or non-bogus.ESCR restrictionsMSR_CRU_ESCR0MSR_CRU_ESCR1Counter numbersper ESCRESCR0: 12, 13, 16ESCR Event Select01HESCR1: 14, 15, 17ESCR[31:25]ESCR[24:9]ESCR Event MaskBitCCCR SelectEvent SpecificNotes0: NBOGUSThe marked μops are not bogus.1: BOGUSThe marked μops are bogus.04HCCCR[15:13]P6: EMON_UOPS_RETIREDVol. 3 A-89PERFORMANCE-MONITORING EVENTSTable A-6.
Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersCan Support PEBSParameter ValueDescriptionNouop_typeThis event is used in conjunctionwith the front-end at-retirementmechanism to tag load and storeμops.ESCR restrictionsMSR_RAT_ESCR0MSR_RAT_ESCR1Counter numbersper ESCRESCR0: 12, 13, 16ESCR Event Select02HESCR1: 14, 15, 17ESCR[31:25]ESCR[24:9]ESCR Event MaskBitCCCR Select1: TAGLOADSThe μop is a load operation.2: TAGSTORESThe μop is a store operation.02HCCCR[15:13]Event SpecificNotesCan Support PEBSSetting the TAGLOADS andTAGSTORES mask bits does notcause a counter to increment.They are only used to tag uops.Nobranch_retiredA-90 Vol. 3This event counts the retirementof a branch.
Specify one or moremask bits to select anycombination of taken, not-taken,predicted and mispredicted.ESCR restrictionsMSR_CRU_ESCR2MSR_CRU_ESCR3See Table 18-17 for the addressesof the ESCR MSRsCounter numbersper ESCRESCR2: 12, 13, 16The counter numbers associatedwith each ESCR are provided. Theperformance counters andcorresponding CCCRs can beobtained from Table 18-17.ESCR Event Select06HESCR3: 14, 15, 17ESCR[31:25]PERFORMANCE-MONITORING EVENTSTable A-6. Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersParameter ValueDescriptionESCR[24:9]ESCR Event MaskBitCCCR Select0: MMNPBranch not-taken predicted1: MMNMBranch not-taken mispredicted2: MMTPBranch taken predicted3: MMTMBranch taken mispredicted05HCCCR[15:13]Event SpecificNotesCan Support PEBSP6: EMON_BR_INST_RETIREDNomispred_branch_retiredThis event represents theretirement of mispredicted branchinstructions.ESCR restrictionsMSR_CRU_ESCR0MSR_CRU_ESCR1Counter numbersper ESCRESCR0: 12, 13, 16ESCR Event Select03HESCR1: 14, 15, 17ESCR Event MaskESCR[31:25]ESCR[24:9]Bit 0: NBOGUSThe retired instruction is notbogus.CCCR Select04HCCCR[15:13]Can Support PEBSNox87_assistThis event counts the retirementof x87 instructions that requiredspecial handling.Specifies one or more event maskbits to select the type ofassistance.ESCR restrictionsMSR_CRU_ESCR2MSR_CRU_ESCR3Counter numbersper ESCRESCR2: 12, 13, 16ESCR Event Select03HESCR3: 14, 15, 17ESCR[31:25]Vol.
3 A-91PERFORMANCE-MONITORING EVENTSTable A-6. Performance Monitoring Events For Intel NetBurstMicroarchitecture for At-Retirement Counting (Contd.)Event NameEvent ParametersParameter ValueDescriptionESCR[24:9]ESCR Event MaskBit0: FPSUHandle FP stack underflow1: FPSOHandle FP stack overflow2: POAOHandle x87 output overflow3: POAUHandle x87 output underflow4: PREAHandle x87 input assistCCCR Select05HCCCR[15:13]Can Support PEBSNomachine_clearThis event increments according tothe mask bit specified while theentire pipeline of the machine iscleared. Specify one of the maskbit to select the cause.ESCR restrictionsMSR_CRU_ESCR2MSR_CRU_ESCR3Counter numbersper ESCRESCR2: 12, 13, 16ESCR Event Select02HESCR3: 14, 15, 17ESCR Event MaskESCR[31:25]ESCR[24:9]BitA-92 Vol. 30: CLEARCounts for a portion of the manycycles while the machine is clearedfor any cause.
Use Edge triggeringfor this bit only to get a count ofoccurrence versus a duration.2: MOCLEARIncrements each time the machineis cleared due to memory orderingissues.6: SMCLEARIncrements each time the machineis cleared due to self-modifyingcode issues.CCCR Select05HCCCR[15:13]Can Support PEBSNoPERFORMANCE-MONITORING EVENTSTable A-7. Intel NetBurst Microarchitecture Model-Specific Performance MonitoringEvents (For Model Encoding 3, 4 or 6)Event NameEvent ParametersParameter Valueinstr_completedDescriptionThis event counts instructions thathave completed and retired duringa clock cycle.
Mask bits specifywhether the instruction is bogusor non-bogus and whether theyare:ESCR restrictionsMSR_CRU_ESCR0MSR_CRU_ESCR1Counter numbersper ESCRESCR0: 12, 13, 16ESCR Event Select07HESCR1: 14, 15, 17ESCR[31:25]ESCR[24:9]ESCR Event MaskBitCCCR Select0: NBOGUSNon-bogus instructions1: BOGUSBogus instructions04HCCCR[15:13]Event SpecificNotesCan Support PEBSThis metric differs frominstr_retired, since it countsinstructions completed, ratherthan the number of times thatinstructions started.NoVol. 3 A-93PERFORMANCE-MONITORING EVENTSTable A-8.
List of Metrics Available for Front_end Tagging(For Front_end Event Only)Front-endmetric1MSR_TC_PRECISE_EVENT MSR Bit fieldAdditional MSREvent mask value forFront_end_eventmemory_loadsNoneSet TAGLOADS bitin ESCRcorresponding toevent Uop_Type.NBOGUSmemory_storesNoneSet TAGSTORES bitin the ESCRcorresponding toevent Uop_Type.NBOGUSNOTES:1.
There may be some undercounting of front end events when there is an overflow or underflow ofthe floating point stack.Table A-9. List of Metrics Available for Execution Tagging(For Execution Event Only)Execution metricUpstream ESCRTagValue inUpstream ESCREvent mask value forexecution_eventpacked_SP_retiredSet ALL bit in eventmask, TagUop bit inESCR ofpacked_SP_uop.1NBOGUS0packed_DP_retiredSet ALL bit in eventmask, TagUop bit inESCR ofpacked_DP_uop.1NBOGUS0scalar_SP_retiredSet ALL bit in eventmask, TagUop bit inESCR ofscalar_SP_uop.1NBOGUS0scalar_DP_retiredSet ALL bit in eventmask, TagUop bit inESCR ofscalar_DP_uop.1NBOGUS0128_bit_MMX_retiredSet ALL bit in eventmask, TagUop bit inESCR of128_bit_MMX_uop.1NBOGUS0A-94 Vol.
3PERFORMANCE-MONITORING EVENTSTable A-9. List of Metrics Available for Execution Tagging(For Execution Event Only) (Contd.)Execution metricUpstream ESCRTagValue inUpstream ESCREvent mask value forexecution_event64_bit_MMX_retiredSet ALL bit in eventmask, TagUop bit inESCR of64_bit_MMX_uop.1NBOGUS0X87_FP_retiredSet ALL bit in eventmask, TagUop bit inESCR ofx87_FP_uop.1NBOGUS01NBOGUS0X87_SIMD_memory_m Set ALLP0, ALLP2oves_retiredbits in event mask,TagUop bit in ESCRof X87_SIMD_moves_uop.Table A-10. List of Metrics Available for Replay Tagging(For Replay Event Only)Replay metric1IA32_PEBS_ENABLE Fieldto SetMSR_PEBS_MATRIX_VERTBit Field to SetAdditional MSR/EventEvent MaskValue forReplay_event1stL_cache_load_miss_retiredBit 0, Bit 24,Bit 25Bit 0NoneNBOGUS2ndL_cache_load_miss_retired2Bit 1, Bit 24,Bit 25Bit 0NoneNBOGUSDTLB_load_miss_retiredBit 2, Bit 24,Bit 25Bit 0NoneNBOGUSDTLB_store_miss_retiredBit 2, Bit 24,Bit 25Bit 1NoneNBOGUSDTLB_all_miss_retiredBit 2, Bit 24,Bit 25Bit 0, Bit 1NoneNBOGUSTagged_mispred_branchBit 15, Bit 16,Bit 24, Bit 25Bit 4NoneNBOGUSMOB_load_replay_retired3Bit 9, Bit 24,Bit 25Bit 0SelectMOB_load_replayevent and setPARTIAL_DATA andUNALGN_ADDR bit.NBOGUSVol.
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