Volume 2B Instruction Set Reference N-Z (794102), страница 41
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The SFflag indicates the sign of the signed result.The SBB instruction is usually executed as part of a multibyte or multiword subtraction in which a SUB instruction is followed by a SBB instruction.This instruction can be used with a LOCK prefix to allow the instruction to beexecuted atomically.In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefixin the form of REX.R permits access to additional registers (R8-R15). Using a REXprefix in the form of REX.W promotes operation to 64 bits. See the summary chart atthe beginning of this section for encoding data and limits.4-288 Vol. 2BSBB—Integer Subtraction with BorrowINSTRUCTION SET REFERENCE, N-ZOperationDEST ← (DEST – (SRC + CF));Flags AffectedThe OF, SF, ZF, AF, PF, and CF flags are set according to the result.Protected Mode Exceptions#GP(0)If the destination is located in a non-writable segment.If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.If the DS, ES, FS, or GS register contains a NULL segmentselector.#SS(0)If a memory operand effective address is outside the SSsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used but the destination is not a memoryoperand.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SSsegment limit.#UDIf the LOCK prefix is used but the destination is not a memoryoperand.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SSsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made.#UDIf the LOCK prefix is used but the destination is not a memoryoperand.SBB—Integer Subtraction with BorrowVol.
2B 4-289INSTRUCTION SET REFERENCE, N-ZCompatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a noncanonical form.#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used but the destination is not a memoryoperand.4-290 Vol. 2BSBB—Integer Subtraction with BorrowINSTRUCTION SET REFERENCE, N-ZSCAS/SCASB/SCASW/SCASD—Scan StringOpcodeInstruction64-BitModeCompat/Leg ModeDescriptionAESCAS m8ValidValidCompare AL with byte at ES:(E)DI or RDI,then set status flags.*AFSCAS m16ValidValidCompare AX with word at ES:(E)DI orRDI, then set status flags.*AFSCAS m32ValidValidCompare EAX with doubleword atES(E)DI or RDI then set status flags.*REX.W + AFSCAS m64ValidN.E.Compare RAX with quadword at RDI orEDI then set status flags.AESCASBValidValidCompare AL with byte at ES:(E)DI or RDIthen set status flags.*AFSCASWValidValidCompare AX with word at ES:(E)DI or RDIthen set status flags.*AFSCASDValidValidCompare EAX with doubleword atES:(E)DI or RDI then set status flags.*REX.W + AFSCASQValidN.E.Compare RAX with quadword at RDI orEDI then set status flags.NOTES:* In 64-bit mode, only 64-bit (RDI) and 32-bit (EDI) address sizes are supported.
In non-64-bit mode,only 32-bit (EDI) and 16-bit (DI) address sizes are supported.DescriptionIn non-64-bit modes and in default 64-bit mode: this instruction compares a byte,word, doubleword or quadword specified using a memory operand with the value inAL, AX, or EAX. It then sets status flags in EFLAGS recording the results. The memoryoperand address is read from ES:(E)DI register (depending on the address-sizeattribute of the instruction and the current operational mode).
Note that ES cannotbe overridden with a segment override prefix.At the assembly-code level, two forms of this instruction are allowed. The explicitoperand form and the no-operands form. The explicit-operand form (specified usingthe SCAS mnemonic) allows a memory operand to be specified explicitly. Thememory operand must be a symbol that indicates the size and location of theoperand value.
The register operand is then automatically selected to match the sizeof the memory operand (AL register for byte comparisons, AX for word comparisons,EAX for doubleword comparisons). The explicit-operand form is provided to allowdocumentation. Note that the documentation provided by this form can bemisleading. That is, the memory operand symbol must specify the correct type (size)of the operand (byte, word, or doubleword) but it does not have to specify the correctlocation.
The location is always specified by ES:(E)DI.SCAS/SCASB/SCASW/SCASD—Scan StringVol. 2B 4-291INSTRUCTION SET REFERENCE, N-ZThe no-operands form of the instruction uses a short form of SCAS. Again, ES:(E)DIis assumed to be the memory operand and AL, AX, or EAX is assumed to be theregister operand. The size of operands is selected by the mnemonic: SCASB (bytecomparison), SCASW (word comparison), or SCASD (doubleword comparison).After the comparison, the (E)DI register is incremented or decremented automatically according to the setting of the DF flag in the EFLAGS register. If the DF flag is 0,the (E)DI register is incremented; if the DF flag is 1, the (E)DI register is decremented. The register is incremented or decremented by 1 for byte operations, by 2for word operations, and by 4 for doubleword operations.SCAS, SCASB, SCASW, SCASD, and SCASQ can be preceded by the REP prefix forblock comparisons of ECX bytes, words, doublewords, or quadwords.
Often, however,these instructions will be used in a LOOP construct that takes some action based onthe setting of status flags. See “REP/REPE/REPZ/REPNE/REPNZ—Repeat StringOperation Prefix” in this chapter for a description of the REP prefix.In 64-bit mode, the instruction’s default address size is 64-bits, 32-bit address size issupported using the prefix 67H. Using a REX prefix in the form of REX.W promotesoperation on doubleword operand to 64 bits. The 64-bit no-operand mnemonic isSCASQ. Address of the memory operand is specified in either RDI or EDI, andAL/AX/EAX/RAX may be used as the register operand.
After a comparison, the destination register is incremented or decremented by the current operand size(depending on the value of the DF flag). See the summary chart at the beginning ofthis section for encoding data and limits.OperationNon-64-bit Mode:IF (Byte cmparison)THENtemp ← AL − SRC;SetStatusFlags(temp);THEN IF DF = 0THEN (E)DI ← (E)DI + 1;ELSE (E)DI ← (E)DI – 1; FI;ELSE IF (Word comparison)THENtemp ← AX − SRC;SetStatusFlags(temp);IF DF = 0THEN (E)DI ← (E)DI + 2;ELSE (E)DI ← (E)DI – 2; FI;FI;ELSE IF (Doubleword comparison)THEN4-292 Vol.
2BSCAS/SCASB/SCASW/SCASD—Scan StringINSTRUCTION SET REFERENCE, N-Ztemp ← EAX – SRC;SetStatusFlags(temp);IF DF = 0THEN (E)DI ← (E)DI + 4;ELSE (E)DI ← (E)DI – 4; FI;FI;FI;64-bit Mode:IF (Byte cmparison)THENtemp ← AL − SRC;SetStatusFlags(temp);THEN IF DF = 0THEN (R|E)DI ← (R|E)DI + 1;ELSE (R|E)DI ← (R|E)DI – 1; FI;ELSE IF (Word comparison)THENtemp ← AX − SRC;SetStatusFlags(temp);IF DF = 0THEN (R|E)DI ← (R|E)DI + 2;ELSE (R|E)DI ← (R|E)DI – 2; FI;FI;ELSE IF (Doubleword comparison)THENtemp ← EAX – SRC;SetStatusFlags(temp);IF DF = 0THEN (R|E)DI ← (R|E)DI + 4;ELSE (R|E)DI ← (R|E)DI – 4; FI;FI;ELSE IF (Quadword comparison using REX.W )THENtemp ← RAX − SRC;SetStatusFlags(temp);IF DF = 0THEN (R|E)DI ← (R|E)DI + 8;ELSE (R|E)DI ← (R|E)DI – 8;FI;FI;FSCAS/SCASB/SCASW/SCASD—Scan StringVol.
2B 4-293INSTRUCTION SET REFERENCE, N-ZFlags AffectedThe OF, SF, ZF, AF, PF, and CF flags are set according to the temporary result of thecomparison.Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the limit of theES segment.If the ES register contains a NULL segment selector.If an illegal memory operand effective address in the ESsegment is given.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SSsegment limit.#UDIf the LOCK prefix is used.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SSsegment limit.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made.#UDIf the LOCK prefix is used.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.#PF(fault-code)If a page fault occurs.4-294 Vol.
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