Volume 2B Instruction Set Reference N-Z (794102), страница 38
Текст из файла (страница 38)
2B 4-265INSTRUCTION SET REFERENCE, N-Zinformation also loaded *)CS(RPL) ← CPL;ESP ← ESP + SRC; (* Release parameters from called procedure’s stack *)tempESP ← Pop();tempSS ← Pop(); (* 32-bit pop, high-order 16 bits discarded, segment descriptorinformation also loaded *)ESP ← tempESP;SS ← tempSS;ELSEIF OperandSize = 16THENEIP ← Pop();EIP ← EIP AND 0000FFFFH;CS ← Pop(); (* 16-bit pop; segment descriptor information also loaded *)CS(RPL) ← CPL;ESP ← ESP + SRC; (* release parameters from calledprocedure’s stack *)tempESP ← Pop();tempSS ← Pop(); (* 16-bit pop; segment descriptor information loaded *)ESP ← tempESP;SS ← tempSS;ELSE (* OperandSize = 64 *)RIP ← Pop();CS ← Pop(); (* 64-bit pop; high-order 48 bits discarded; segmentdescriptor information loaded *)CS(RPL) ← CPL;ESP ← ESP + SRC; (* Release parameters from called procedure’sstack *)tempESP ← Pop();tempSS ← Pop(); (* 64-bit pop; high-order 48 bits discarded; segmentdescriptor information also loaded *)ESP ← tempESP;SS ← tempSS;FI;FI;FOR each of segment register (ES, FS, GS, and DS)DOIF segment register points to data or non-conforming code segmentand CPL > segment descriptor DPL; (* DPL in hidden part of segment register *)THEN SegmentSelector ← 0; (* SegmentSelector invalid *)FI;OD;4-266 Vol.
2BRET—Return from ProcedureINSTRUCTION SET REFERENCE, N-ZFor each of ES, FS, GS, and DSDOIF segment selector index is not within descriptor table limitsor segment descriptor indicates the segment is not a data or readable code segmentor if the segment is a data or non-conforming code segmentand the segment descriptor’s DPL < CPL or RPL of code segment’s segment selectorTHEN SegmentSelector ← 0; (* SegmentSelector invalid *)OD;ESP ESP + SRC; (* Release parameters from calling procedure’s stack *)Flags AffectedNone.Protected Mode Exceptions#GP(0)If the return code or stack segment selector NULL.If the return instruction pointer is not within the return codesegment limit#GP(selector)If the RPL of the return code segment selector is less then theCPL.If the return code or stack segment selector index is not withinits descriptor table limits.If the return code segment descriptor does not indicate a codesegment.If the return code segment is non-conforming and the segmentselector’s DPL is not equal to the RPL of the code segment’ssegment selectorIf the return code segment is conforming and the segmentselector’s DPL greater than the RPL of the code segment’ssegment selectorIf the stack segment is not a writable data segment.If the stack segment selector RPL is not equal to the RPL of thereturn code segment selector.If the stack segment descriptor DPL is not equal to the RPL ofthe return code segment selector.#SS(0)If the top bytes of stack are not within stack limits.If the return stack segment is not present.#NP(selector)If the return code segment is not present.#PF(fault-code)If a page fault occurs.#AC(0)If an unaligned memory access occurs when the CPL is 3 andalignment checking is enabled.RET—Return from ProcedureVol.
2B 4-267INSTRUCTION SET REFERENCE, N-ZReal-Address Mode Exceptions#GPIf the return instruction pointer is not within the return codesegment limit#SSIf the top bytes of stack are not within stack limits.Virtual-8086 Mode Exceptions#GP(0)If the return instruction pointer is not within the return codesegment limit#SS(0)If the top bytes of stack are not within stack limits.#PF(fault-code)If a page fault occurs.#AC(0)If an unaligned memory access occurs when alignment checkingis enabled.Compatibility Mode ExceptionsSame as 64-bit mode exceptions.64-Bit Mode Exceptions#GP(0)If the return instruction pointer is non-canonical.If the return instruction pointer is not within the return codesegment limit.If the stack segment selector is NULL going back to compatibilitymode.If the stack segment selector is NULL going back to CPL3 64-bitmode.If a NULL stack segment selector RPL is not equal to CPL goingback to non-CPL3 64-bit mode.If the return code segment selector is NULL.#GP(selector)If the proposed segment descriptor for a code segment does notindicate it is a code segment.If the proposed new code segment descriptor has both the D-bitand L-bit set.If the DPL for a nonconforming-code segment is not equal to theRPL of the code segment selector.If CPL is greater than the RPL of the code segment selector.If the DPL of a conforming-code segment is greater than thereturn code segment selector RPL.If a segment selector index is outside its descriptor table limits.If a segment descriptor memory address is non-canonical.If the stack segment is not a writable data segment.4-268 Vol.
2BRET—Return from ProcedureINSTRUCTION SET REFERENCE, N-ZIf the stack segment descriptor DPL is not equal to the RPL ofthe return code segment selector.If the stack segment selector RPL is not equal to the RPL of thereturn code segment selector.#SS(0)If an attempt to pop a value off the stack violates the SS limit.If an attempt to pop a value off the stack causes a non-canonicaladdress to be referenced.#NP(selector)If the return code or stack segment is not present.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.RET—Return from ProcedureVol.
2B 4-269INSTRUCTION SET REFERENCE, N-ZRSM—Resume from System Management ModeOpcodeInstructionNonSMMModeSMM ModeDescription0F AARSMInvalidValidResume operation of interruptedprogram.DescriptionReturns program control from system management mode (SMM) to the applicationprogram or operating-system procedure that was interrupted when the processorreceived an SMM interrupt. The processor’s state is restored from the dump createdupon entering SMM. If the processor detects invalid state information during staterestoration, it enters the shutdown state.
The following invalid information can causea shutdown:••Any reserved bit of CR4 is set to 1.•(Intel Pentium and Intel486™ processors only.) The value stored in the statedump base field is not a 32-KByte aligned address.Any illegal combination of bits in CR0, such as (PG=1 and PE=0) or (NW=1 andCD=0).The contents of the model-specific registers are not affected by a return from SMM.The SMM state map used by RSM supports resuming processor context for non64-bit modes and 64-bit mode.See Chapter 24, “System Management,” in the Intel® 64 and IA-32 ArchitecturesSoftware Developer’s Manual, Volume 3B, for more information about SMM and thebehavior of the RSM instruction.OperationReturnFromSMM;IF (IA-32e mode supported)THENProcessorState ← Restore(SMMDump(IA-32e SMM STATE MAP));ElseProcessorState ← Restore(SMMDump(Non-32-Bit-Mode SMM STATE MAP));FIFlags AffectedAll.4-270 Vol.
2BRSM—Resume from System Management ModeINSTRUCTION SET REFERENCE, N-ZProtected Mode Exceptions#UDIf an attempt is made to execute this instruction when theprocessor is not in SMM.If the LOCK prefix is used.Real-Address Mode ExceptionsSame exceptions as in protected mode.Virtual-8086 Mode ExceptionsSame exceptions as in protected mode.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode ExceptionsSame exceptions as in protected mode.RSM—Resume from System Management ModeVol.
2B 4-271INSTRUCTION SET REFERENCE, N-ZRSQRTPS—Compute Reciprocals of Square Roots of Packed SinglePrecision Floating-Point ValuesOpcodeInstruction64-BitModeCompat/Leg ModeDescription0F 52 /rRSQRTPS xmm1,xmm2/m128ValidValidComputes the approximate reciprocalsof the square roots of the packedsingle-precision floating-point valuesin xmm2/m128 and stores the resultsin xmm1.DescriptionPerforms a SIMD computation of the approximate reciprocals of the square roots ofthe four packed single-precision floating-point values in the source operand (secondoperand) and stores the packed single-precision floating-point results in the destination operand. The source operand can be an XMM register or a 128-bit memory location. The destination operand is an XMM register.
See Figure 10-5 in the Intel® 64and IA-32 Architectures Software Developer’s Manual, Volume 1, for an illustration ofa SIMD single-precision floating-point operation.The relative error for this approximation is:|Relative Error| ≤ 1.5 ∗ 2−12The RSQRTPS instruction is not affected by the rounding control bits in the MXCSRregister. When a source value is a 0.0, an ∞ of the sign of the source value isreturned. A denormal source value is treated as a 0.0 (of the same sign).
When asource value is a negative value (other than −0.0), a floating-point indefinite isreturned. When a source value is an SNaN or QNaN, the SNaN is converted to a QNaNor the source QNaN is returned.In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction toaccess additional registers (XMM8-XMM15).OperationDEST[31:0] ← APPROXIMATE(1.0/SQRT(SRC[31:0]));DEST[63:32] ← APPROXIMATE(1.0/SQRT(SRC[63:32]));DEST[95:64] ← APPROXIMATE(1.0/SQRT(SRC[95:64]));DEST[127:96] ← APPROXIMATE(1.0/SQRT(SRC[127:96]));Intel C/C++ Compiler Intrinsic EquivalentRSQRTPS __m128 _mm_rsqrt_ps(__m128 a)4-272 Vol. 2BRSQRTPS—Compute Reciprocals of Square Roots of Packed Single-Precision FloatingPoint ValuesINSTRUCTION SET REFERENCE, N-ZSIMD Floating-Point ExceptionsNone.Protected Mode Exceptions#GP(0)For an illegal memory operand effective address in the CS, DS,ES, FS or GS segments.If a memory operand is not aligned on a 16-byte boundary,regardless of segment.#SS(0)For an illegal address in the SS segment.#PF(fault-code)For a page fault.#NMIf CR0.TS[bit 3] = 1.#UDIf CR0.EM[bit 2] = 1.If CR4.OSFXSR[bit 9] = 0.If CPUID.01H:EDX.SSE[bit 25] = 0.If the LOCK prefix is used.Real-Address Mode Exceptions#GP(0)If a memory operand is not aligned on a 16-byte boundary,regardless of segment.If any part of the operand lies outside the effective addressspace from 0 to FFFFH.#NMIf CR0.TS[bit 3] = 1.#UDIf CR0.EM[bit 2] = 1.If CR4.OSFXSR[bit 9] = 0.If CPUID.01H:EDX.SSE[bit 25] = 0.If the LOCK prefix is used.Virtual-8086 Mode ExceptionsSame exceptions as in real address mode.#PF(fault-code)For a page fault.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a noncanonical form.RSQRTPS—Compute Reciprocals of Square Roots of Packed Single-Precision FloatingPoint ValuesVol.
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