Volume 4 128-Bit Media Instructions (794098), страница 44
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3.09—July 2007PSUBSWAMD64 TechnologyPacked Subtract Signed With Saturation WordsSubtracts each packed 16-bit signed integer value in the second source operand from thecorresponding packed 16-bit signed integer in the first source operand and writes the signed integerresult of each subtraction in the corresponding word of the destination (first source).
The firstsource/destination and source operands are an XMM register and another XMM register or 128-bitmemory location.For each packed value in the destination, if the value is larger than the largest signed 16-bit integer, it issaturated to 7FFFh, and if the value is smaller than the smallest signed 16-bit integer, it is saturated to8000h.The PSUBSW instruction is an SSE2 instruction. The presence of this instruction set is indicated by aCPUID feature bit.
(See “CPUID” in Volume 3.)MnemonicOpcodePSUBSW xmm1,xmm2/mem128DescriptionSubtracts packed 16-bit signed integer values in anXMM register or 128-bit memory location from packed16-bit integer values in another XMM register andwrites the result in the destination XMM register.66 0F E9 /rxmm1....xmm2/mem128..127 112 111 96 95 80 79 64 63 48 47 32 31 16 15.....0127 112 111 96 95 80 79 64 63 48 47 32 31 16 15......0.subtractsaturatesubtractsaturatepsubsw-128.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSB, PSUBUSB, PSUBUSW, PSUBWrFLAGS AffectedNoneMXCSR Flags AffectedNoneInstruction ReferencePSUBSW337AMD64 Technology26568—Rev. 3.09—July 2007ExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe SSE2 instructions are not supported, asindicated by EDX bit 26 of CPUID function0000_0001h.XXXThe emulate bit (EM) of CR0 was set to 1.XXXThe operating-system FXSAVE/FXRSTOR supportbit (OSFXSR) of CR4 is cleared to 0.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXThe memory operand was not aligned on a 16-byteboundary while MXCSR.MM was cleared to 0.Page fault, #PFXXA page fault resulted from the execution of theinstruction.Alignment check, #ACXXAn unaligned memory reference was performed whilealignment checking was enabled withMXCSR.MM set to 1.Invalid opcode, #UDGeneral protection, #GPX338PSUBSWInstruction Reference26568—Rev.
3.09—July 2007PSUBUSBAMD64 TechnologyPacked Subtract Unsigned and Saturate BytesSubtracts each packed 8-bit unsigned integer value in the second source operand from thecorresponding packed 8-bit unsigned integer in the first source operand and writes the unsigned integerresult of each subtraction in the corresponding byte of the destination (first source). The firstsource/destination operand is an XMM register and the second source operand is another XMMregister or 128-bit memory location.For each packed value in the destination, if the value is larger than the largest unsigned 8-bit integer, itis saturated to FFh, and if the value is smaller than the smallest unsigned 8-bit integer, it is saturated to00h.The PSUBUSB instruction is an SSE2 instruction.
The presence of this instruction set is indicated by aCPUID feature bit. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBUSB xmm1, xmm2/mem128DescriptionSubtracts packed byte unsigned integer values in anXMM register or 128-bit memory location frompacked byte integer values in another XMM registerand writes the result in the destination XMM register.66 0F D8 /rxmm1........xmm2/mem128......1270.............127.0..............subtractsaturatesubtractsaturatepsubusb-128.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSB, PSUBSW, PSUBUSW, PSUBWrFLAGS AffectedNoneMXCSR Flags AffectedNoneInstruction ReferencePSUBUSB339AMD64 Technology26568—Rev. 3.09—July 2007ExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe SSE2 instructions are not supported, asindicated by EDX bit 26 of CPUID function0000_0001h.XXXThe emulate bit (EM) of CR0 was set to 1.XXXThe operating-system FXSAVE/FXRSTOR supportbit (OSFXSR) of CR4 is cleared to 0.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XA page fault resulted from the execution of theinstruction.Invalid opcode, #UDGeneral protection, #GPPage fault, #PF340XPSUBUSBInstruction Reference26568—Rev.
3.09—July 2007PSUBUSWAMD64 TechnologyPacked Subtract Unsigned and Saturate WordsSubtracts each packed 16-bit unsigned integer value in the second source operand from thecorresponding packed 16-bit unsigned integer in the first source operand and writes the unsignedinteger result of each subtraction in the corresponding word of the destination (first source). The firstsource/destination operand is an XMM register and the second source operand is another XMMregister or 128-bit memory location.For each packed value in the destination, if the value is larger than the largest unsigned 16-bit integer,it is saturated to FFFFh, and if the value is smaller than the smallest unsigned 16-bit integer, it issaturated to 0000h.The PSUBUSW instruction is an SSE2 instruction.
The presence of this instruction set is indicated bya CPUID feature bit. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBUSW xmm1,xmm2/mem128DescriptionSubtracts packed 16-bit unsigned integer values inan XMM register or 128-bit memory location frompacked 16-bit integer values in another XMM registerand writes the result in the destination XMM register.66 0F D9 /rxmm1....xmm2/mem128..127 112 111 96 95 80 79 64 63 48 47 32 31 16 15.....0127 112 111 96 95 80 79 64 63 48 47 32 31 16 15......0.subtractsaturatesubtractsaturatepsubusw-128.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSB, PSUBSW, PSUBUSB, PSUBWrFLAGS AffectedNoneMXCSR Flags AffectedNoneInstruction ReferencePSUBUSW341AMD64 Technology26568—Rev. 3.09—July 2007ExceptionsExceptionRealVirtual8086 ProtectedCause of ExceptionXXXThe SSE2 instructions are not supported, asindicated by EDX bit 26 of CPUID function0000_0001h.XXXThe emulate bit (EM) of CR0 was set to 1.XXXThe operating-system FXSAVE/FXRSTOR supportbit (OSFXSR) of CR4 is cleared to 0.Device not available,#NMXXXThe task-switch bit (TS) of CR0 was set to 1.Stack, #SSXXXA memory address exceeded the stack segment limitor was non-canonical.XXXA memory address exceeded a data segment limit orwas non-canonical.XA null data segment was used to reference memory.XXThe memory operand was not aligned on a 16-byteboundary while MXCSR.MM was cleared to 0.Page fault, #PFXXA page fault resulted from the execution of theinstruction.Alignment check, #ACXXAn unaligned memory reference was performed whilealignment checking was enabled withMXCSR.MM set to 1.Invalid opcode, #UDGeneral protection, #GPX342PSUBUSWInstruction Reference26568—Rev.
3.09—July 2007AMD64 TechnologyPSUBWPacked Subtract WordsSubtracts each packed 16-bit integer value in the second source operand from the correspondingpacked 16-bit integer in the first source operand and writes the integer result of each subtraction in thecorresponding word of the destination (first source). The first source/destination operand is an XMMregister and the second source operand is another XMM register or 128-bit memory location.For each packed value in the destination, if the value is larger than the largest unsigned 16-bit integer,it is saturated to FFFFh, and if the value is smaller than the smallest unsigned 16-bit integer, it issaturated to 0000h.This instruction operates on both signed and unsigned integers.
If the result overflows, the carry isignored (neither the overflow nor carry bit in rFLAGS is set), and only the low-order 16 bits of theresult are written in the destination.The PSUBW instruction is an SSE2 instruction. The presence of this instruction set is indicated by aCPUID feature bit. (See “CPUID” in Volume 3.)MnemonicOpcodePSUBW xmm1, xmm2/mem128DescriptionSubtracts packed 16-bit integer values in an XMMregister or 128-bit memory location from packed 16-bitinteger values in another XMM register and writes theresult in the destination XMM register.66 0F F9 /rxmm1....xmm2/mem128..127 112 111 96 95 80 79 64 63 48 47 32 31 16 15.....0.127 112 111 96 95 80 79 64 63 48 47 32 31 16 15.....0.subtractsubtractpsubw-128.epsRelated InstructionsPSUBB, PSUBD, PSUBQ, PSUBSB, PSUBSW, PSUBUSB, PSUBUSWrFLAGS AffectedNoneInstruction ReferencePSUBW343AMD64 Technology26568—Rev.
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