Volume 2B Instruction Set Reference N-Z (794102), страница 19
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The destination operand can be a general-purpose register, memory location, or segmentregister.4-130 Vol. 2BPOP—Pop a Value from the StackINSTRUCTION SET REFERENCE, N-ZThe address-size attribute of the stack segment determines the stack pointer size(16, 32, 64 bits) and the operand-size attribute of the current code segment determines the amount the stack pointer is incremented (2, 4, 8 bytes).For example, if the address- and operand-size attributes are 32, the 32-bit ESPregister (stack pointer) is incremented by 4; if they are 16, the 16-bit SP register isincremented by 2. (The B flag in the stack segment’s segment descriptor determinesthe stack’s address-size attribute, and the D flag in the current code segment’ssegment descriptor, along with prefixes, determines the operand-size attribute andalso the address-size attribute of the destination operand.)If the destination operand is one of the segment registers DS, ES, FS, GS, or SS, thevalue loaded into the register must be a valid segment selector.
In protected mode,popping a segment selector into a segment register automatically causes thedescriptor information associated with that segment selector to be loaded into thehidden (shadow) part of the segment register and causes the selector and thedescriptor information to be validated (see the “Operation” section below).A NULL value (0000-0003) may be popped into the DS, ES, FS, or GS register withoutcausing a general protection fault.
However, any subsequent attempt to reference asegment whose corresponding segment register is loaded with a NULL value causesa general protection exception (#GP). In this situation, no memory reference occursand the saved value of the segment register is NULL.The POP instruction cannot pop a value into the CS register. To load the CS registerfrom the stack, use the RET instruction.If the ESP register is used as a base register for addressing a destination operand inmemory, the POP instruction computes the effective address of the operand after itincrements the ESP register. For the case of a 16-bit stack where ESP wraps to 0H asa result of the POP instruction, the resulting location of the memory write isprocessor-family-specific.The POP ESP instruction increments the stack pointer (ESP) before data at the old topof stack is written into the destination.A POP SS instruction inhibits all interrupts, including the NMI interrupt, until afterexecution of the next instruction.
This action allows sequential execution of POP SSand MOV ESP, EBP instructions without the danger of having an invalid stack duringan interrupt1. However, use of the LSS instruction is the preferred method of loadingthe SS and ESP registers.1. If a code instruction breakpoint (for debug) is placed on an instruction located immediately aftera POP SS instruction, the breakpoint may not be triggered.
However, in a sequence of instructions that POP the SS register, only the first instruction in the sequence is guaranteed to delayan interrupt.In the following sequence, interrupts may be recognized before POP ESP executes:POP SSPOP SSPOP ESPPOP—Pop a Value from the StackVol. 2B 4-131INSTRUCTION SET REFERENCE, N-ZIn 64-bit mode, using a REX prefix in the form of REX.R permits access to additionalregisters (R8-R15). When in 64-bit mode, POPs using 32-bit operands are not encodable and POPs to DS, ES, SS are not valid.
See the summary chart at the beginningof this section for encoding data and limits.OperationIF StackAddrSize = 32THENIF OperandSize = 32THENDEST ← SS:ESP; (* Copy a doubleword *)ESP ← ESP + 4;ELSE (* OperandSize = 16*)DEST ← SS:ESP; (* Copy a word *)ESP ← ESP + 2;FI;ELSE IF StackAddrSize = 64THENIF OperandSize = 64THENDEST ← SS:RSP; (* Copy quadword *)RSP ← RSP + 8;ELSE (* OperandSize = 16*)DEST ← SS:RSP; (* Copy a word *)RSP ← RSP + 2;FI;FI;ELSE StackAddrSize = 16THENIF OperandSize = 16THENDEST ← SS:SP; (* Copy a word *)SP ← SP + 2;ELSE (* OperandSize = 32 *)DEST ← SS:SP; (* Copy a doubleword *)SP ← SP + 4;FI;FI;Loading a segment register while in protected mode results in special actions, asdescribed in the following listing.
These checks are performed on the segmentselector and the segment descriptor it points to.4-132 Vol. 2BPOP—Pop a Value from the StackINSTRUCTION SET REFERENCE, N-Z64-BIT_MODEIF FS, or GS is loaded with non-NULL selector;THENIF segment selector index is outside descriptor table limitsOR segment is not a data or readable code segmentOR ((segment is a data or nonconforming code segment)AND (both RPL and CPL > DPL))THEN #GP(selector);IF segment not marked presentTHEN #NP(selector);ELSESegmentRegister ← segment selector;SegmentRegister ← segment descriptor;FI;FI;IF FS, or GS is loaded with a NULL selector;THENSegmentRegister ← segment selector;SegmentRegister ← segment descriptor;FI;PREOTECTED MODE OR COMPATIBILITY MODE;IF SS is loaded;THENIF segment selector is NULLTHEN #GP(0);FI;IF segment selector index is outside descriptor table limitsor segment selector's RPL ≠ CPLor segment is not a writable data segmentor DPL ≠ CPLTHEN #GP(selector);FI;IF segment not marked presentTHEN #SS(selector);ELSESS ← segment selector;SS ← segment descriptor;FI;FI;POP—Pop a Value from the StackVol.
2B 4-133INSTRUCTION SET REFERENCE, N-ZIF DS, ES, FS, or GS is loaded with non-NULL selector;THENIF segment selector index is outside descriptor table limitsor segment is not a data or readable code segmentor ((segment is a data or nonconforming code segment)and (both RPL and CPL > DPL))THEN #GP(selector);FI;IF segment not marked presentTHEN #NP(selector);ELSESegmentRegister ← segment selector;SegmentRegister ← segment descriptor;FI;FI;IF DS, ES, FS, or GS is loaded with a NULL selectorTHENSegmentRegister ← segment selector;SegmentRegister ← segment descriptor;FI;Flags AffectedNone.Protected Mode Exceptions#GP(0)If attempt is made to load SS register with NULL segmentselector.If the destination operand is in a non-writable segment.If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.If the DS, ES, FS, or GS register is used to access memory and itcontains a NULL segment selector.#GP(selector)If segment selector index is outside descriptor table limits.If the SS register is being loaded and the segment selector's RPLand the segment descriptor’s DPL are not equal to the CPL.If the SS register is being loaded and the segment pointed to is anon-writable data segment.If the DS, ES, FS, or GS register is being loaded and thesegment pointed to is not a data or readable code segment.4-134 Vol.
2BPOP—Pop a Value from the StackINSTRUCTION SET REFERENCE, N-ZIf the DS, ES, FS, or GS register is being loaded and thesegment pointed to is a data or nonconforming code segment,but both the RPL and the CPL are greater than the DPL.#SS(0)If the current top of stack is not within the stack segment.If a memory operand effective address is outside the SSsegment limit.#SS(selector)If the SS register is being loaded and the segment pointed to ismarked not present.#NPIf the DS, ES, FS, or GS register is being loaded and thesegment pointed to is marked not present.#PF(fault-code)If a page fault occurs.#AC(0)If an unaligned memory reference is made while the currentprivilege level is 3 and alignment checking is enabled.#UDIf the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#UDIf the LOCK prefix is used.Virtual-8086 Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#PF(fault-code)If a page fault occurs.#AC(0)If an unaligned memory reference is made while alignmentchecking is enabled.#UDIf the LOCK prefix is used.Compatibility Mode ExceptionsSame as for protected mode exceptions.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.#SS(U)If the stack address is in a non-canonical form.#GP(selector)If the descriptor is outside the descriptor table limit.If the FS or GS register is being loaded and the segment pointedto is not a data or readable code segment.If the FS or GS register is being loaded and the segment pointedto is a data or nonconforming code segment, but both the RPLand the CPL are greater than the DPL.POP—Pop a Value from the StackVol.
2B 4-135INSTRUCTION SET REFERENCE, N-Z#AC(0)If an unaligned memory reference is made while alignmentchecking is enabled.#PF(fault-code)If a page fault occurs.#NPIf the FS or GS register is being loaded and the segment pointedto is marked not present.#UDIf the LOCK prefix is used.4-136 Vol. 2BPOP—Pop a Value from the StackINSTRUCTION SET REFERENCE, N-ZPOPA/POPAD—Pop All General-Purpose RegistersOpcodeInstruction64-BitModeCompat/Leg ModeDescription61POPAInvalidValidPop DI, SI, BP, BX, DX, CX, and AX.61POPADInvalidValidPop EDI, ESI, EBP, EBX, EDX, ECX, andEAX.DescriptionPops doublewords (POPAD) or words (POPA) from the stack into the general-purposeregisters. The registers are loaded in the following order: EDI, ESI, EBP, EBX, EDX,ECX, and EAX (if the operand-size attribute is 32) and DI, SI, BP, BX, DX, CX, and AX(if the operand-size attribute is 16). (These instructions reverse the operation of thePUSHA/PUSHAD instructions.) The value on the stack for the ESP or SP register isignored.
Instead, the ESP or SP register is incremented after each register is loaded.The POPA (pop all) and POPAD (pop all double) mnemonics reference the sameopcode. The POPA instruction is intended for use when the operand-size attribute is16 and the POPAD instruction for when the operand-size attribute is 32. Someassemblers may force the operand size to 16 when POPA is used and to 32 whenPOPAD is used (using the operand-size override prefix [66H] if necessary). Othersmay treat these mnemonics as synonyms (POPA/POPAD) and use the current settingof the operand-size attribute to determine the size of values to be popped from thestack, regardless of the mnemonic used.
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