Volume 2A Instruction Set Reference A-M (794101), страница 95
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Thesource operand specifies a 48-bit or a 32-bit pointer in memory depending on thecurrent setting of the operand-size attribute (32 bits or 16 bits, respectively). The3-594 Vol. 2ALDS/LES/LFS/LGS/LSS—Load Far PointerINSTRUCTION SET REFERENCE, A-Minstruction opcode and the destination operand specify a segment register/generalpurpose register pair. The 16-bit segment selector from the source operand is loadedinto the segment register specified with the opcode (DS, SS, ES, FS, or GS). The32-bit or 16-bit offset is loaded into the register specified with the destinationoperand.If one of these instructions is executed in protected mode, additional informationfrom the segment descriptor pointed to by the segment selector in the sourceoperand is loaded in the hidden part of the selected segment register.Also in protected mode, a NULL selector (values 0000 through 0003) can be loadedinto DS, ES, FS, or GS registers without causing a protection exception.
(Any subsequent reference to a segment whose corresponding segment register is loaded witha NULL selector, causes a general-protection exception (#GP) and no memory reference to the segment occurs.)In 64-bit mode, the instruction’s default operation size is 32 bits. Using a REX prefixin the form of REX.W promotes operation to specify a source operand referencing an80-bit pointer (16-bit selector, 64-bit offset) in memory. Using a REX prefix in theform of REX.R permits access to additional registers (R8-R15).
See the summarychart at the beginning of this section for encoding data and limits.Operation64-BIT_MODEIF SS is loadedTHENIF SegmentSelector = NULL and ( (RPL = 3) or(RPL ≠ 3 and RPL ≠ CPL) )THEN #GP(0);ELSE IF descriptor is in non-canonical spaceTHEN #GP(0); FI;ELSE IF Segment selector index is not within descriptor table limitsor segment selector RPL ≠ CPLor access rights indicate nonwritable data segmentor DPL ≠ CPLTHEN #GP(selector); FI;ELSE IF Segment marked not presentTHEN #SS(selector); FI;FI;SS ← SegmentSelector(SRC);SS ← SegmentDescriptor([SRC]);ELSE IF attempt to load DS, or ESTHEN #UD;ELSE IF FS, or GS is loaded with non-NULL segment selectorTHEN IF Segment selector index is not within descriptor table limitsor access rights indicate segment neither data nor readable code segmentLDS/LES/LFS/LGS/LSS—Load Far PointerVol.
2A 3-595INSTRUCTION SET REFERENCE, A-Mor segment is data or nonconforming-code segmentand ( RPL > DPL or CPL > DPL)THEN #GP(selector); FI;ELSE IF Segment marked not presentTHEN #NP(selector); FI;FI;SegmentRegister ← SegmentSelector(SRC) ;SegmentRegister ← SegmentDescriptor([SRC]);FI;ELSE IF FS, or GS is loaded with a NULL selector:THENSegmentRegister ← NULLSelector;SegmentRegister(DescriptorValidBit) ← 0; FI; (* Hidden flag;not accessible by software *)FI;DEST ← Offset(SRC);PREOTECTED MODE OR COMPATIBILITY MODE;IF SS is loadedTHENIF SegementSelector = NULLTHEN #GP(0);ELSE IF Segment selector index is not within descriptor table limitsor segment selector RPL ≠ CPLor access rights indicate nonwritable data segmentor DPL ≠ CPLTHEN #GP(selector); FI;ELSE IF Segment marked not presentTHEN #SS(selector); FI;FI;SS ← SegmentSelector(SRC);SS ← SegmentDescriptor([SRC]);ELSE IF DS, ES, FS, or GS is loaded with non-NULL segment selectorTHEN IF Segment selector index is not within descriptor table limitsor access rights indicate segment neither data nor readable code segmentor segment is data or nonconforming-code segmentand (RPL > DPL or CPL > DPL)THEN #GP(selector); FI;ELSE IF Segment marked not presentTHEN #NP(selector); FI;FI;SegmentRegister ← SegmentSelector(SRC) AND RPL;SegmentRegister ← SegmentDescriptor([SRC]);FI;3-596 Vol.
2ALDS/LES/LFS/LGS/LSS—Load Far PointerINSTRUCTION SET REFERENCE, A-MELSE IF DS, ES, FS, or GS is loaded with a NULL selector:THENSegmentRegister ← NULLSelector;SegmentRegister(DescriptorValidBit) ← 0; FI; (* Hidden flag;not accessible by software *)FI;DEST ← Offset(SRC);Real-Address or Virtual-8086 ModeSegmentRegister ← SegmentSelector(SRC); FI;DEST ← Offset(SRC);Flags AffectedNone.Protected Mode Exceptions#UDIf source operand is not a memory location.If the LOCK prefix is used.#GP(0)If a NULL selector is loaded into the SS register.If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.If the DS, ES, FS, or GS register is used to access memory and itcontains a NULL segment selector.#GP(selector)If the SS register is being loaded and any of the following is true:the segment selector index is not within the descriptor tablelimits, the segment selector RPL is not equal to CPL, thesegment is a non-writable data segment, or DPL is not equal toCPL.If the DS, ES, FS, or GS register is being loaded with a non-NULLsegment selector and any of the following is true: the segmentselector index is not within descriptor table limits, the segmentis neither a data nor a readable code segment, or the segment isa data or nonconforming-code segment and both RPL and CPLare greater than DPL.#SS(0)If a memory operand effective address is outside the SSsegment limit.#SS(selector)If the SS register is being loaded and the segment is marked notpresent.#NP(selector)If DS, ES, FS, or GS register is being loaded with a non-NULLsegment selector and the segment is marked not present.#PF(fault-code)If a page fault occurs.LDS/LES/LFS/LGS/LSS—Load Far PointerVol.
2A 3-597INSTRUCTION SET REFERENCE, A-M#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SSsegment limit.#UDIf source operand is not a memory location.If the LOCK prefix is used.Virtual-8086 Mode Exceptions#UDIf source operand is not a memory location.#GP(0)If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SS(0)If a memory operand effective address is outside the SSsegment limit.If the LOCK prefix is used.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made.Compatibility Mode ExceptionsSame exceptions as in protected mode.64-Bit Mode Exceptions#GP(0)If the memory address is in a non-canonical form.If a NULL selector is attempted to be loaded into the SS registerin compatibility mode.If a NULL selector is attempted to be loaded into the SS registerin CPL3 and 64-bit mode.If a NULL selector is attempted to be loaded into the SS registerin non-CPL3 and 64-bit mode where its RPL is not equal to CPL.#GP(Selector)3-598 Vol.
2AIf the FS, or GS register is being loaded with a non-NULLsegment selector and any of the following is true: the segmentselector index is not within descriptor table limits, the memoryaddress of the descriptor is non-canonical, the segment isneither a data nor a readable code segment, or the segment is adata or nonconforming-code segment and both RPL and CPL aregreater than DPL.LDS/LES/LFS/LGS/LSS—Load Far PointerINSTRUCTION SET REFERENCE, A-MIf the SS register is being loaded and any of the following is true:the segment selector index is not within the descriptor tablelimits, the memory address of the descriptor is non-canonical,the segment selector RPL is not equal to CPL, the segment is anonwritable data segment, or DPL is not equal to CPL.#SS(0)If a memory operand effective address is non-canonical#SS(Selector)If the SS register is being loaded and the segment is marked notpresent.#NP(selector)If FS, or GS register is being loaded with a non-NULL segmentselector and the segment is marked not present.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf source operand is not a memory location.If the LOCK prefix is used.LDS/LES/LFS/LGS/LSS—Load Far PointerVol.
2A 3-599INSTRUCTION SET REFERENCE, A-MLEA—Load Effective AddressOpcodeInstructionOp/En64-BitModeCompat/ DescriptionLeg Mode8D /rLEA r16,mAValidValidStore effective address form in register r16.8D /rLEA r32,mAValidValidStore effective address form in register r32.REX.W + 8D /rLEA r64,mAValidN.E.Store effective address form in register r64.Instruction Operand EncodingOp/EnOperand 1Operand 2Operand 3Operand 4AModRM:reg (w)ModRM:r/m (r)NANADescriptionComputes the effective address of the second operand (the source operand) andstores it in the first operand (destination operand). The source operand is a memoryaddress (offset part) specified with one of the processors addressing modes; thedestination operand is a general-purpose register. The address-size and operand-sizeattributes affect the action performed by this instruction, as shown in the followingtable.
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