Volume 3 General-Purpose and System Instructions (794097), страница 69
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Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Instruction Subsets and CPUID Feature Sets411AMD64 TechnologyTable D-1.24594—Rev. 3.13—July 2007Instruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicDescriptionCPLGeneralPurpose128-BitMedia64-BitMediaSSECVTPI2PSConvert PackedDoubleword Integers toPacked Single-PrecisionFloating-Point3SSECVTPS2DQConvert Packed SinglePrecision Floating-Point toPacked DoublewordIntegers3SSE2CVTPS2PDConvert Packed SinglePrecision Floating-Point toPacked Double-PrecisionFloating-Point3SSE2CVTPS2PIConvert Packed SinglePrecision Floating-Point toPacked DoublewordIntegers3SSECVTSD2SIConvert Scalar DoublePrecision Floating-Point toSigned Doubleword orQuadword Integer3SSE2CVTSD2SSConvert Scalar DoublePrecision Floating-Point toScalar Single-PrecisionFloating-Point3SSE2CVTSI2SDConvert SignedDoubleword or QuadwordInteger to Scalar DoublePrecision Floating-Point3SSE2CVTSI2SSConvert SignedDoubleword or QuadwordInteger to Scalar SinglePrecision Floating-Point3SSECVTSS2SDConvert Scalar SinglePrecision Floating-Point toScalar Double-PrecisionFloating-Point3SSE2CVTSS2SIConvert Scalar SinglePrecision Floating-Point toSigned Doubleword orQuadword Integer3SSEx87SystemSSENote:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.412Instruction Subsets and CPUID Feature Sets24594—Rev. 3.13—July 2007Table D-1.AMD64 TechnologyInstruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicGeneralPurpose128-BitMediaDescriptionCPLCVTTPD2DQConvert Packed DoublePrecision Floating-Point toPacked DoublewordIntegers, Truncated3SSE2CVTTPD2PIConvert Packed DoublePrecision Floating-Point toPacked DoublewordIntegers, Truncated3SSE2CVTTPS2DQConvert Packed SinglePrecision Floating-Point toPacked DoublewordIntegers, Truncated3SSE2CVTTPS2PIConvert Packed SinglePrecision Floating-Point toPacked DoublewordIntegers, Truncated3SSECVTTSD2SIConvert Scalar DoublePrecision Floating-Point toSigned Doubleword orQuadword Integer,Truncated3SSE2CVTTSS2SIConvert Scalar SinglePrecision Floating-Point toSigned Doubleword orQuadword Integer,Truncated3SSECWDConvert Word toDoubleword3BasicCWDEConvert Word toDoubleword3BasicDAADecimal Adjust afterAddition3BasicDASDecimal Adjust afterSubtraction3BasicDECDecrement by 13BasicDIVUnsigned Divide3BasicDIVPDDivide Packed DoublePrecision Floating-Point364-BitMediax87SystemSSE2SSESSE2Note:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Instruction Subsets and CPUID Feature Sets413AMD64 TechnologyTable D-1.24594—Rev. 3.13—July 2007Instruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicDescriptionCPLGeneralPurpose128-BitMedia64-BitMediax87MMX™MMXDIVPSDivide Packed SinglePrecision Floating-Point3SSEDIVSDDivide Scalar DoublePrecision Floating-Point3SSE2DIVSSDivide Scalar SinglePrecision Floating-Point3SSEEMMSEnter/Exit Multimedia State3ENTERCreate Procedure StackFrame3EXTRQExtract Field From Register3F2XM1Floating-Point Compute2x–13X87FABSFloating-Point AbsoluteValue3X87FADDFloating-Point Add3X87FADDPFloating-Point Add and Pop3X87FBLDFloating-Point Load BinaryCoded Decimal3X87FBSTPFloating-Point StoreBinary-Coded DecimalInteger and Pop3X87FCHSFloating-Point ChangeSign3X87FCLEXFloating-Point Clear Flags3X87FCMOVBFloating-Point ConditionalMove If Below3X87,CMOVccFCMOVBEFloating-Point ConditionalMove If Below or Equal3X87,CMOVccFCMOVEFloating-Point ConditionalMove If Equal3X87,CMOVccFCMOVNBFloating-Point ConditionalMove If Not Below3X87,CMOVccFCMOVNBEFloating-Point ConditionalMove If Not Below or Equal3X87,CMOVccFCMOVNEFloating-Point ConditionalMove If Not Equal3X87,CMOVccFCMOVNUFloating-Point ConditionalMove If Not Unordered3X87,CMOVccSystemBasicSSE4ANote:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.414Instruction Subsets and CPUID Feature Sets24594—Rev. 3.13—July 2007Table D-1.AMD64 TechnologyInstruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicDescriptionCPLGeneralPurpose128-BitMedia64-BitMediax87Floating-Point ConditionalMove If Unordered3X87,CMOVccFCOMFloating-Point Compare3X87FCOMIFloating-Point Compareand Set Flags3X87FCOMIPFloating-Point Compareand Set Flags and Pop3X87FCOMPFloating-Point Compareand Pop3X87FCOMPPFloating-Point Compareand Pop Twice3X87FCOSFloating-Point Cosine3X87FDECSTPFloating-Point DecrementStack-Top Pointer3X87FDIVFloating-Point Divide3X87FDIVPFloating-Point Divide andPop3X87FDIVRFloating-Point DivideReverse3X87FDIVRPFloating-Point DivideReverse and Pop3X87FEMMSFast Enter/Exit MultimediaState3FFREEFree Floating-PointRegister3X87FIADDFloating-Point Add Integerto Stack Top3X87FICOMFloating-Point IntegerCompare3X87FICOMPFloating-Point IntegerCompare and Pop3X87FIDIVFloating-Point IntegerDivide3X87FIDIVRFloating-Point IntegerDivide Reverse3X87FILDFloating-Point Load Integer3X87FIMULFloating-Point IntegerMultiply3X87FCMOVU3DNow!™System3DNow!Note:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Instruction Subsets and CPUID Feature Sets415AMD64 TechnologyTable D-1.24594—Rev. 3.13—July 2007Instruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicDescriptionCPLGeneralPurpose128-BitMedia64-BitMediax87FINCSTPFloating-Point IncrementStack-Top Pointer3X87FINITFloating-Point Initialize3X87FISTFloating-Point IntegerStore3X87FISTPFloating-Point IntegerStore and Pop3X87FISTTPFloating-Point IntegerTruncate and Store3SSE3FISUBFloating-Point IntegerSubtract3X87FISUBRFloating-Point IntegerSubtract Reverse3X87FLDFloating-Point Load3X87FLD1Floating-Point Load +1.03X87FLDCWFloating-Point Load x87Control Word3X87FLDENVFloating-Point Load x87Environment3X87FLDL2EFloating-Point LoadLog2 e3X87FLDL2TFloating-Point LoadLog2 103X873X873X87FLDLG2Floating-Point Load Log102FLDLN2Floating-Point Load Ln 2FLDPIFloating-Point Load Pi3X87FLDZFloating-Point Load +0.03X87FMULFloating-Point Multiply3X87FMULPFloating-Point Multiply andPop3X87FNCLEXFloating-Point No-WaitClear Flags3X87FNINITFloating-Point No-WaitInitialize3X87FNOPFloating-Point NoOperation3X87SystemNote:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.416Instruction Subsets and CPUID Feature Sets24594—Rev. 3.13—July 2007Table D-1.AMD64 TechnologyInstruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicDescriptionCPLGeneralPurpose128-BitMedia64-BitMediax87X87X87FNSAVESave No-Wait x87 andMMX State3FNSTCWFloating-Point No-WaitStore x87 Control Word3X87FNSTENVFloating-Point No-WaitStore x87 Environment3X87FNSTSWFloating-Point No-WaitStore x87 Status Word3X87FPATANFloating-Point PartialArctangent3X87FPREMFloating-Point PartialRemainder3X87FPREM1Floating-Point PartialRemainder3X87FPTANFloating-Point PartialTangent3X87FRNDINTFloating-Point Round toInteger3X87FRSTORRestore x87 and MMXState3X87X87FSAVESave x87 and MMX State3X87X87FSCALEFloating-Point Scale3X87FSINFloating-Point Sine3X87FSINCOSFloating-Point Sine andCosine3X87FSQRTFloating-Point Square Root3X87FSTFloating-Point Store StackTop3X87FSTCWFloating-Point Store x87Control Word3X87FSTENVFloating-Point Store x87Environment3X87FSTPFloating-Point Store StackTop and Pop3X87FSTSWFloating-Point Store x87Status Word3X87FSUBFloating-Point Subtract3X87SystemNote:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.Instruction Subsets and CPUID Feature Sets417AMD64 TechnologyTable D-1.24594—Rev. 3.13—July 2007Instruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicGeneralPurpose128-BitMedia64-BitMediaDescriptionCPLx87FSUBPFloating-Point Subtract andPop3X87FSUBRFloating-Point SubtractReverse3X87FSUBRPFloating-Point SubtractReverse and Pop3X87FTSTFloating-Point Test withZero3X87FUCOMFloating-Point UnorderedCompare3X87FUCOMIFloating-Point UnorderedCompare and Set Flags3X87FUCOMIPFloating-Point UnorderedCompare and Set Flagsand Pop3X87FUCOMPFloating-Point UnorderedCompare and Pop3X87FUCOMPPFloating-Point UnorderedCompare and Pop Twice3X87FWAITWait for x87 Floating-PointExceptions3X87FXAMFloating-Point Examine3X87FXCHFloating-Point Exchange3FXRSTORRestore XMM, MMX, andx87 StateFXSAVEFXTRACTSystemX873FXSAVE,FXRSTORFXSAVE,FXRSTORFXSAVE,FXRSTORSave XMM, MMX, and x87State3FXSAVE,FXRSTORFXSAVE,FXRSTORFXSAVE,FXRSTORFloating-Point ExtractExponent and Significand3X87FYL2XFloating-Point y * log2x3X87FYL2XP1Floating-Pointy * log2(x +1)3X87HADDPDHorizontal Add PackedDouble3SSE3HADDPSHorizontal Add PackedSingle3SSE3HLTHalt0BasicNote:1.
Columns indicate the instruction subsets. Entries indicate the CPUID feature set(s) to which the instruction belongs.2. Mnemonic is used for two different instructions. Assemblers can distinguish them by the number and type of operands.418Instruction Subsets and CPUID Feature Sets24594—Rev. 3.13—July 2007Table D-1.AMD64 TechnologyInstruction Subsets and CPUID Feature Sets (continued)Instruction Subsetand CPUID Feature Set(s)1InstructionMnemonicGeneralPurpose128-BitMedia64-BitMediaDescriptionCPLx87SystemHSUBPDHorizontal Subtract PackedDouble3SSE3HSUBPSHorizontal Subtract PackedSingle3SSE3IDIVSigned Divide3IMULSigned Multiply3BasicINInput from Port3BasicINCIncrement by 13BasicINSInput String3BasicINSBInput String Byte3BasicINSDInput String Doubleword3BasicINSERTQInsert Field3INSWInput String Word3BasicINTInterrupt to Vector3BasicINT 3Interrupt to Debug Vector3INTOInterrupt to Overflow Vector3INVDInvalidate Caches0BasicINVLPGInvalidate TLB Entry0BasicINVLPGAInvalidate TLB Entry in aSpecified ASID0SVMIRETInterrupt Return Word3BasicIRETDInterrupt ReturnDoubleword3BasicIRETQInterrupt Return Quadword3JccJump Condition3BasicSSE4ABasicBasicLong ModeBasicJCXZJump if CX Zero3BasicJECXZJump if ECX Zero3BasicJMPJump3BasicJRCXZJump if RCX Zero3BasicLAHFLoad Status Flags into AHRegister3BasicLARLoad Access Rights Byte3LDDQULoad Unaligned DoubleQuadword3SSE3LDMXCSRLoad MXCSRControl/Status Register3SSEBasicNote:1.
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