Volume 2 System Programming (794096), страница 68
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VME has no effect on protected-mode programs.Protected-Mode Virtual Interrupts (PVI)—These allow virtual interrupts in protected mode whenCPL=3. Interrupt redirection is not available in protected mode. PVI has no effect on virtual-8086mode programs.Because virtual-8086 mode is not supported in long mode, VME extensions are not supported in longmode.
PVI extensions are, however, supported in long mode.Exceptions and Interrupts245AMD64 Technology24593—Rev. 3.13—July 20078.10.1 Virtual-8086 Mode ExtensionsThe virtual-8086-mode extensions (VME) enable performance enhancements for 8086 programsrunning as protected tasks in virtual-8086 mode. These extensions are enabled by setting CR4.VME(bit 0) to 1. The extensions enabled by CR4.VME are:••Virtualizing control and notification of maskable external interrupts with the EFLAGS VIF (bit 19)and VIP (bit 20) bits.Selective interception of software interrupts (INTn instructions) using the TSS interruptredirection bitmap (IRB).Background. Legacy-8086 programs expect to have full access to the EFLAGS interrupt flag (IF) bit,allowing programs to enable and disable maskable external interrupts.
When those programs run invirtual-8086 mode under a multitasking protected-mode environment, it can disrupt the operatingsystem if programs enable or disable interrupts for their own purposes. This is particularly true ifinterrupts associated with one program can occur during execution of another program.
For example, aprogram could request that an area of memory be copied to disk. System software could suspend theprogram before external hardware uses an interrupt to acknowledge that the block has been copied.System software could subsequently start a second program which enables interrupts. This secondprogram could receive the external interrupt indicating that the memory block of the first program hasbeen copied. If that were to happen, the second program would probably be unprepared to handle theinterrupt properly.Access to the IF bit must be managed by system software on a task-by-task basis to prevent corruptionof system resources. In order to completely manage the IF bit, system software must be able tointerrupt all instructions that can read or write the bit.
These instructions include STI, CLI, PUSHF,POPF, INTn, and IRET. These instructions are part of an instruction class that is IOPL-sensitive. Theprocessor takes a general-protection exception (#GP) whenever an IOPL-sensitive instruction isexecuted and the EFLAGS.IOPL field is less than the CPL. Because all virtual-8086 programs run atCPL=3, system software can interrupt all instructions that modify the IF bit by setting IOPL<3.System software maintains a virtual image of the IF bit for each virtual-8086 program by emulating theactions of IOPL-sensitive instructions that modify the IF bit.
When an external maskable-interruptoccurs, system software checks the state of the IF image for the current virtual-8086 program todetermine whether the program is masking interrupts. If the program is masking interrupts, systemsoftware saves the interrupt information until the virtual-8086 program attempts to re-enableinterrupts. When the virtual-8086 program unmasks interrupts with an IOPL-sensitive instruction,system software traps the action with the #GP handler.The performance of a processor can be significantly degraded by the overhead of trapping andemulating IOPL-sensitive instructions, and the overhead of maintaining images of the IF bit for eachvirtual-8086 program. This performance loss can be eliminated by running virtual-8086 programs withIOPL set to 3, thus allowing changes to the real IF flag from any privilege level.
Unfortunately, this canleave critical system resources unprotected.246Exceptions and Interrupts24593—Rev. 3.13—July 2007AMD64 TechnologyIn addition to the performance problems caused by virtualizing the IF bit, software interrupts (INTninstructions) cannot be masked by the IF bit or virtual copies of the IF bit.
The IF bit only affectsmaskable external interrupts. Software interrupts in virtual-8086 mode are normally directed to thereal mode interrupt-vector table (IVT), but it can be desirable to redirect certain interrupts to theprotected-mode interrupt-descriptor table (IDT).The virtual-8086-mode extensions are designed to support both external interrupts and softwareinterrupts, with mechanisms that preserve high performance without compromising protection.Virtualization of external interrupts is supported using two bits in the EFLAGS register: the virtualinterrupt flag (VIF) bit and the virtual-interrupt pending (VIP) bit.
Redirection of software interrupts issupported using the interrupt-redirection bitmap (IRB) in the TSS. A separate TSS can be created foreach virtual-8086 program, allowing system software to control interrupt redirection independently foreach virtual-8086 program.VIF and VIP Extensions for External Interrupts. When VME extensions are enabled, the IF-modifying instructions normally trapped by system software are allowed to execute. However, insteadof modifying the IF bit, they modify the EFLAGS VIF bit. This leaves control over maskable interruptsto the system software.
It can also be used as an indicator to system software that the virtual-8086program is able to, or is expecting to, receive external interrupts.When an unmasked external interrupt occurs, the processor transfers control from the virtual-8086program to a protected-mode interrupt handler. If the interrupt handler determines that the interrupt isfor the virtual-8086 program, it can check the state of the VIF bit in the EFLAGS value pushed on thestack for the virtual-8086 program. If the VIF bit is set (indicating the virtual-8086 program attemptedto unmask interrupts), system software can allow the interrupt to be handled by the appropriate virtual8086 interrupt handler.If the VIF bit is clear (indicating the virtual-8086 program attempted to mask interrupts) and theinterrupt is for the virtual-8086 program, system software can hold the interrupt pending. Systemsoftware holds an interrupt pending by saving appropriate information about the interrupt, such as theinterrupt vector, and setting the virtual-8086 program's VIP bit in the EFLAGS image on the stack.When the virtual-8086 program later attempts to set IF, the previously set VIP bit causes a generalprotection exception (#GP) to occur.
System software can then pass the saved interrupt information tothe virtual-8086 interrupt handler.To summarize, when the VME extensions are enabled (CR4.VME=1), the VIF and VIP bits are set andcleared as follows:••VIF Bit—This bit is set and cleared by the processor in virtual-8086 mode in response to anattempt by a virtual-8086 program to set and clear the EFLAGS.IF bit. VIF is used by systemsoftware to determine whether a maskable external interrupt should be passed on to the virtual8086 program, emulated by system software, or held pending. VIF is also cleared during softwareinterrupts through interrupt gates, with the original VIF value preserved in the EFLAGS image onthe stack.VIP Bit—System software sets and clears this bit in the EFLAGS image saved on the stack after aninterrupt.
It can be set when an interrupt occurs for a virtual-8086 program that has a clear VIF bit.Exceptions and Interrupts247AMD64 Technology24593—Rev. 3.13—July 2007The processor examines the VIP bit when an attempt is made by the virtual-8086 program to setthe IF bit. If VIP is set when the program attempts to set IF, a general-protection exception (#GP)occurs before execution of the IF-setting instruction.
System software must clear VIP to avoidrepeated #GP exceptions when returning to the interrupted instruction.The VIF and VIP bits can be used by system software to minimize the overhead associated withmanaging maskable external interrupts because virtual copies of the IF flag do not have to bemaintained by system software. Instead, VIF and VIP are maintained during context switches alongwith the remaining EFLAGS bits.Table 8-11 on page 250 shows how the behavior of instructions that modify the IF bit are affected bythe VME extensions.Interrupt Redirection of Software Interrupts.
In virtual-8086 mode, software interrupts (INTninstructions) are trapped using a #GP exception handler if the IOPL is less than 3 (the CPL for virtual8086 mode). This allows system software to interrupt and emulate 8086-interrupt handlers. Systemsoftware can set the IOPL to 3, in which case the INTn instruction is vectored through a gate descriptorin the protected-mode IDT. System software can use the gate to control access to the virtual-8086mode interrupt-vector table (IVT), or to redirect the interrupt to a protected-mode interrupt handler.When VME extensions are enabled, for INTn instructions to execute normally, vectoring directly to avirtual-8086 interrupt handler through the virtual-8086 IVT (located at address 0 in the virtual-addressspace of the task).
For security or performance reasons, however, it can be necessary to intercept INTninstructions on a vector-specific basis to allow servicing by protected-mode interrupt handlers. This isperformed by using the interrupt-redirection bitmap (IRB), located in the TSS and enabled whenCR4.VME=1. The IRB is available only in virtual-8086 mode.Figure 12-6 on page 312 shows the format of the TSS, with the interrupt redirection bitmap locatednear the top. The IRB contains 256 bits, one for each possible software-interrupt vector.
The mostsignificant bit of the IRB controls interrupt vector 255, and is located immediately before the IOPBbase. The least-significant bit of the IRB controls interrupt vector 0.The bits in the IRB function as follows:••When set to 1, the INTn instruction behaves as if the VME extensions are not enabled. Theinterrupt is directed through the IDT to a protected-mode interrupt handler if IOPL=3.
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