Volume 1 Application Programming (794095), страница 11
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The 128-bit and 64-bitmedia instructions include saturating-arithmetic instructions to simplify this type of operation. Aresult that otherwise would wrap around due to overflow or underflow is instead forced to saturate atthe largest or smallest value that can be represented in the destination register.1.1.5 Floating-Point InstructionsThe AMD64 architecture provides three floating-point instruction subsets, using three distinct registersets:•••128-Bit Media Instructions support 32-bit single-precision and 64-bit double-precision floatingpoint operations, in addition to integer operations. Operations on both vector data and scalar dataare supported, with a dedicated floating-point exception-reporting mechanism. These floatingpoint operations comply with the IEEE-754 standard.64-Bit Media Instructions (the subset of 3DNow! technology instructions) support singleprecision floating-point operations.
Operations on both vector data and scalar data are supported,but these instructions do not support floating-point exception reporting.x87 Floating-Point Instructions support single-precision, double-precision, and 80-bit extendedprecision floating-point operations. Only scalar data are supported, with a dedicated floating-pointexception-reporting mechanism. The x87 floating-point instructions contain special instructionsfor performing trigonometric and logarithmic transcendental operations. The single-precision anddouble-precision floating-point operations comply with the IEEE-754 standard.Maximum floating-point performance can be achieved using the 128-bit media instructions.
One ofthese vector instructions can support up to four single-precision (or two double-precision) operationsin parallel. In 64-bit mode, the AMD64 architecture doubles the number of legacy XMM registersfrom 8 to 16.Applications gain additional benefits using the 64-bit media and x87 instructions. The separate registersets supported by these instructions relieve pressure on the XMM registers available to the 128-bitmedia instructions. This provides application programs with three distinct sets of floating-pointregisters. In addition, certain high-end implementations of the AMD64 architecture may support 128bit media, 64-bit media, and x87 instructions with separate execution units.Overview of the AMD64 Architecture5AMD64 Technology1.224592—Rev. 3.13—July 2007Modes of OperationTable 1-1 on page 2 summarizes the modes of operation supported by the AMD64 architecture.
Inmost cases, the default address and operand sizes can be overridden with instruction prefixes. Theregister extensions shown in the second-from-right column of Table 1-1 are those illustrated inFigure 1-1 on page 2.1.2.1 Long ModeLong mode is an extension of legacy protected mode.
Long mode consists of two submodes: 64-bitmode and compatibility mode. 64-bit mode supports all of the features and register extensions of theAMD64 architecture. Compatibility mode supports binary compatibility with existing 16-bit and 32bit applications. Long mode does not support legacy real mode or legacy virtual-8086 mode, and itdoes not support hardware task switching.Throughout this document, references to long mode refer to both 64-bit mode and compatibility mode.If a function is specific to either of these submodes, then the name of the specific submode is usedinstead of the name long mode.1.2.2 64-Bit Mode64-bit mode—a submode of long mode—supports the full range of 64-bit virtual-addressing andregister-extension features.
This mode is enabled by the operating system on an individual codesegment basis. Because 64-bit mode supports a 64-bit virtual-address space, it requires a 64-bitoperating system and tool chain. Existing application binaries can run without recompilation incompatibility mode, under an operating system that runs in 64-bit mode, or the applications can also berecompiled to run in 64-bit mode.Addressing features include a 64-bit instruction pointer (RIP) and an RIP-relative data-addressingmode. This mode accommodates modern operating systems by supporting only a flat address space,with single code, data, and stack space.Register Extensions.
64-bit mode implements register extensions through a group of instructionprefixes, called REX prefixes. These extensions add eight GPRs (R8–R15), widen all GPRs to 64 bits,and add eight 128-bit XMM registers (XMM8–XMM15).The REX instruction prefixes also provide a byte-register capability that makes the low byte of any ofthe sixteen GPRs available for byte operations. This results in a uniform set of byte, word, doubleword,and quadword registers that is better suited to compiler register-allocation.64-Bit Addresses and Operands.
In 64-bit mode, the default virtual-address size is 64 bits(implementations can have fewer). The default operand size for most instructions is 32 bits. For mostinstructions, these defaults can be overridden on an instruction-by-instruction basis using instructionprefixes. REX prefixes specify the 64-bit operand size and register extensions.RIP-Relative Data Addressing. 64-bit mode supports data addressing relative to the 64-bitinstruction pointer (RIP). The legacy x86 architecture supports IP-relative addressing only in control-6Overview of the AMD64 Architecture24592—Rev. 3.13—July 2007AMD64 Technologytransfer instructions.
RIP-relative addressing improves the efficiency of position-independent codeand code that addresses global data.Opcodes. A few instruction opcodes and prefix bytes are redefined to allow register extensions and64-bit addressing. These differences are described in “General-Purpose Instructions in 64-Bit Mode”in Volume 3 and “Differences Between Long Mode and Legacy Mode” in Volume 3.1.2.3 Compatibility ModeCompatibility mode—the second submode of long mode—allows 64-bit operating systems to runexisting 16-bit and 32-bit x86 applications. These legacy applications run in compatibility modewithout recompilation.Applications running in compatibility mode use 32-bit or 16-bit addressing and can access the first4GB of virtual-address space.
Legacy x86 instruction prefixes toggle between 16-bit and 32-bitaddress and operand sizes.As with 64-bit mode, compatibility mode is enabled by the operating system on an individual codesegment basis. Unlike 64-bit mode, however, x86 segmentation functions the same as in the legacy x86architecture, using 16-bit or 32-bit protected-mode semantics. From the application viewpoint,compatibility mode looks like the legacy x86 protected-mode environment. From the operatingsystem viewpoint, however, address translation, interrupt and exception handling, and system datastructures use the 64-bit long-mode mechanisms.1.2.4 Legacy ModeLegacy mode preserves binary compatibility not only with existing 16-bit and 32-bit applications butalso with existing 16-bit and 32-bit operating systems.
Legacy mode consists of the following threesubmodes:•••Protected Mode—Protected mode supports 16-bit and 32-bit programs with memorysegmentation, optional paging, and privilege-checking. Programs running in protected mode canaccess up to 4GB of memory space.Virtual-8086 Mode—Virtual-8086 mode supports 16-bit real-mode programs running as tasksunder protected mode. It uses a simple form of memory segmentation, optional paging, and limitedprotection-checking. Programs running in virtual-8086 mode can access up to 1MB of memoryspace.Real Mode—Real mode supports 16-bit programs using simple register-based memorysegmentation. It does not support paging or protection-checking. Programs running in real modecan access up to 1MB of memory space.Legacy mode is compatible with existing 32-bit processor implementations of the x86 architecture.Processors that implement the AMD64 architecture boot in legacy real mode, just like processors thatimplement the legacy x86 architecture.Overview of the AMD64 Architecture7AMD64 Technology24592—Rev.
3.13—July 2007Throughout this document, references to legacy mode refer to all three submodes—protected mode,virtual-8086 mode, and real mode. If a function is specific to either of these submodes, then the nameof the specific submode is used instead of the name legacy mode.8Overview of the AMD64 Architecture24592—Rev. 3.13—July 20072AMD64 TechnologyMemory ModelThis chapter describes the memory characteristics that apply to application software in the variousoperating modes of the AMD64 architecture. These characteristics apply to all instructions in thearchitecture. Several additional system-level details about memory and cache management aredescribed in Volume 2.2.1Memory Organization2.1.1 Virtual MemoryVirtual memory consists of the entire address space available to programs.
It is a large linear-addressspace that is translated by a combination of hardware and operating-system software to a smallerphysical-address space, parts of which are located in memory and parts on disk or other externalstorage media.Figure 2-1 on page 10 shows how the virtual-memory space is treated in the two submodes of longmode:••64-bit mode—This mode uses a flat segmentation model of virtual memory. The 64-bit virtualmemory space is treated as a single, flat (unsegmented) address space.
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