Volume 1 Application Programming (794095), страница 9
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(2) A field of bits used for a control purpose.MBZMust be zero. If software attempts to set an MBZ bit to 1, a general-protection exception (#GP)occurs.memoryUnless otherwise specified, main memory.ModRMA byte following an instruction opcode that specifies address calculation based on mode (Mod),register (R), and memory (M) variables.moffsetA 16, 32, or 64-bit offset that specifies a memory operand directly, without using a ModRM or SIBbyte.msbMost-significant bit.MSBMost-significant byte.multimedia instructionsA combination of 128-bit media instructions and 64-bit media instructions.xxiiPreface24592—Rev. 3.13—July 2007AMD64 TechnologyoctwordSame as double quadword.offsetSame as displacement.overflowThe condition in which a floating-point number is larger in magnitude than the largest, finite,positive or negative number that can be represented in the data-type format being used.packedSee vector.PAEPhysical-address extensions.physical memoryActual memory, consisting of main memory and cache.probeA check for an address in a processor’s caches or internal buffers.
External probes originateoutside the processor, and internal probes originate within the processor.protected modeA submode of legacy mode.quadwordFour words, or eight bytes, or 64 bits.RAZRead as zero (0), regardless of what is written.real-address modeSee real mode.real modeA short name for real-address mode, a submode of legacy mode.relativeReferencing with a displacement (also called offset) from an instruction pointer rather than thebase of a code segment. Contrast with absolute.reservedFields marked as reserved may be used at some future time.PrefacexxiiiAMD64 Technology24592—Rev. 3.13—July 2007To preserve compatibility with future processors, reserved fields require special handling whenread or written by software.Reserved fields may be further qualified as MBZ, RAZ, SBZ or IGN (see definitions).Software must not depend on the state of a reserved field, nor upon the ability of such fields toreturn to a previously written state.If a reserved field is not marked with one of the above qualifiers, software must not change the stateof that field; it must reload that field with the same values returned from a prior read.REXAn instruction prefix that specifies a 64-bit operand size and provides access to additionalregisters.RIP-relative addressingAddressing relative to the 64-bit RIP instruction pointer.scalarAn atomic value existing independently of any specification of location, direction, etc., as opposedto vectors.setTo write a bit value of 1.
Compare clear.SIBA byte following an instruction opcode that specifies address calculation based on scale (S), index(I), and base (B).SIMDSingle instruction, multiple data. See vector.SSEStreaming SIMD extensions instruction set. See 128-bit media instructions and 64-bit mediainstructions.SSE2Extensions to the SSE instruction set. See 128-bit media instructions and 64-bit mediainstructions.SSE3Further extensions to the SSE instruction set. See 128-bit media instructions.SSE4AFurther extensions to the SSE instruction set.
See 128-bit media instructions.xxivPreface24592—Rev. 3.13—July 2007AMD64 Technologysticky bitA bit that is set or cleared by hardware and that remains in that state until explicitly changed bysoftware.TOPThe x87 top-of-stack pointer.TSSTask-state segment.underflowThe condition in which a floating-point number is smaller in magnitude than the smallest nonzero,positive or negative number that can be represented in the data-type format being used.vector(1) A set of integer or floating-point values, called elements, that are packed into a single operand.Most of the 128-bit and 64-bit media instructions use vectors as operands.
Vectors are also calledpacked or SIMD (single-instruction multiple-data) operands.(2) An index into an interrupt descriptor table (IDT), used to access exception handlers. Compareexception.virtual-8086 modeA submode of legacy mode.VMCBVirtual machine control block.VMMVirtual machine monitor.wordTwo bytes, or 16 bits.x86See legacy x86.RegistersIn the following list of registers, the names are used to refer either to a given register or to the contentsof that register:AH–DHThe high 8-bit AH, BH, CH, and DH registers.
Compare AL–DL.AL–DLThe low 8-bit AL, BL, CL, and DL registers. Compare AH–DH.PrefacexxvAMD64 Technology24592—Rev. 3.13—July 2007AL–r15BThe low 8-bit AL, BL, CL, DL, SIL, DIL, BPL, SPL, and R8B–R15B registers, available in 64-bitmode.BPBase pointer register.CRnControl register number n.CSCode segment register.eAX–eSPThe 16-bit AX, BX, CX, DX, DI, SI, BP, and SP registers or the 32-bit EAX, EBX, ECX, EDX,EDI, ESI, EBP, and ESP registers. Compare rAX–rSP.EFERExtended features enable register.eFLAGS16-bit or 32-bit flags register. Compare rFLAGS.EFLAGS32-bit (extended) flags register.eIP16-bit or 32-bit instruction-pointer register.
Compare rIP.EIP32-bit (extended) instruction-pointer register.FLAGS16-bit flags register.GDTRGlobal descriptor table register.GPRsGeneral-purpose registers. For the 16-bit data size, these are AX, BX, CX, DX, DI, SI, BP, and SP.For the 32-bit data size, these are EAX, EBX, ECX, EDX, EDI, ESI, EBP, and ESP. For the 64-bitdata size, these include RAX, RBX, RCX, RDX, RDI, RSI, RBP, RSP, and R8–R15.IDTRInterrupt descriptor table register.xxviPreface24592—Rev. 3.13—July 2007AMD64 TechnologyIP16-bit instruction-pointer register.LDTRLocal descriptor table register.MSRModel-specific register.r8–r15The 8-bit R8B–R15B registers, or the 16-bit R8W–R15W registers, or the 32-bit R8D–R15Dregisters, or the 64-bit R8–R15 registers.rAX–rSPThe 16-bit AX, BX, CX, DX, DI, SI, BP, and SP registers, or the 32-bit EAX, EBX, ECX, EDX,EDI, ESI, EBP, and ESP registers, or the 64-bit RAX, RBX, RCX, RDX, RDI, RSI, RBP, and RSPregisters.
Replace the placeholder r with nothing for 16-bit size, “E” for 32-bit size, or “R” for 64bit size.RAX64-bit version of the EAX register.RBP64-bit version of the EBP register.RBX64-bit version of the EBX register.RCX64-bit version of the ECX register.RDI64-bit version of the EDI register.RDX64-bit version of the EDX register.rFLAGS16-bit, 32-bit, or 64-bit flags register. Compare RFLAGS.RFLAGS64-bit flags register. Compare rFLAGS.rIP16-bit, 32-bit, or 64-bit instruction-pointer register.
Compare RIP.PrefacexxviiAMD64 Technology24592—Rev. 3.13—July 2007RIP64-bit instruction-pointer register.RSI64-bit version of the ESI register.RSP64-bit version of the ESP register.SPStack pointer register.SSStack segment register.TPRTask priority register (CR8), a new register introduced in the AMD64 architecture to speedinterrupt management.TRTask register.Endian OrderThe x86 and AMD64 architectures address memory using little-endian byte-ordering.
Multibytevalues are stored with their least-significant byte at the lowest byte address, and they are illustratedwith their least significant byte at the right side. Strings are illustrated in reverse order, because theaddresses of their bytes increase from right to left.Related Documents•••••••Peter Abel, IBM PC Assembly Language and Programming, Prentice-Hall, Englewood Cliffs, NJ,1995.Rakesh Agarwal, 80x86 Architecture & Programming: Volume II, Prentice-Hall, EnglewoodCliffs, NJ, 1991.AMD data sheets and application notes for particular hardware implementations of the AMD64architecture.AMD, AMD-K6® MMX™ Enhanced Processor Multimedia Technology, Sunnyvale, CA, 2000.AMD, 3DNow!™ Technology Manual, Sunnyvale, CA, 2000.AMD, AMD Extensions to the 3DNow!™ and MMX™ Instruction Sets, Sunnyvale, CA, 2000.Don Anderson and Tom Shanley, Pentium® Processor System Architecture, Addison-Wesley, NewYork, 1995.xxviiiPreface24592—Rev.
3.13—July 2007••••••••••••••••••••••AMD64 TechnologyNabajyoti Barkakati and Randall Hyde, Microsoft Macro Assembler Bible, Sams, Carmel, Indiana,1992.Barry B. Brey, 8086/8088, 80286, 80386, and 80486 Assembly Language Programming,Macmillan Publishing Co., New York, 1994.Barry B. Brey, Programming the 80286, 80386, 80486, and Pentium Based Personal Computer,Prentice-Hall, Englewood Cliffs, NJ, 1995.Ralf Brown and Jim Kyle, PC Interrupts, Addison-Wesley, New York, 1994.Penn Brumm and Don Brumm, 80386/80486 Assembly Language Programming, WindcrestMcGraw-Hill, 1993.Geoff Chappell, DOS Internals, Addison-Wesley, New York, 1994.Chips and Technologies, Inc. Super386 DX Programmer’s Reference Manual, Chips andTechnologies, Inc., San Jose, 1992.John Crawford and Patrick Gelsinger, Programming the 80386, Sybex, San Francisco, 1987.Cyrix Corporation, 5x86 Processor BIOS Writer's Guide, Cyrix Corporation, Richardson, TX,1995.Cyrix Corporation, M1 Processor Data Book, Cyrix Corporation, Richardson, TX, 1996.Cyrix Corporation, MX Processor MMX Extension Opcode Table, Cyrix Corporation, Richardson,TX, 1996.Cyrix Corporation, MX Processor Data Book, Cyrix Corporation, Richardson, TX, 1997.Ray Duncan, Extending DOS: A Programmer's Guide to Protected-Mode DOS, Addison Wesley,NY, 1991.William B.
Giles, Assembly Language Programming for the Intel 80xxx Family, Macmillan, NewYork, 1991.Frank van Gilluwe, The Undocumented PC, Addison-Wesley, New York, 1994.John L. Hennessy and David A. Patterson, Computer Architecture, Morgan Kaufmann Publishers,San Mateo, CA, 1996.Thom Hogan, The Programmer’s PC Sourcebook, Microsoft Press, Redmond, WA, 1991.Hal Katircioglu, Inside the 486, Pentium®, and Pentium Pro, Peer-to-Peer Communications,Menlo Park, CA, 1997.IBM Corporation, 486SLC Microprocessor Data Sheet, IBM Corporation, Essex Junction, VT,1993.IBM Corporation, 486SLC2 Microprocessor Data Sheet, IBM Corporation, Essex Junction, VT,1993.IBM Corporation, 80486DX2 Processor Floating Point Instructions, IBM Corporation, EssexJunction, VT, 1995.IBM Corporation, 80486DX2 Processor BIOS Writer's Guide, IBM Corporation, Essex Junction,VT, 1995.PrefacexxixAMD64 Technology••••••••••••••••••••24592—Rev. 3.13—July 2007IBM Corporation, Blue Lightning 486DX2 Data Book, IBM Corporation, Essex Junction, VT,1994.Institute of Electrical and Electronics Engineers, IEEE Standard for Binary Floating-PointArithmetic, ANSI/IEEE Std 754-1985.Institute of Electrical and Electronics Engineers, IEEE Standard for Radix-Independent FloatingPoint Arithmetic, ANSI/IEEE Std 854-1987.Muhammad Ali Mazidi and Janice Gillispie Mazidi, 80X86 IBM PC and Compatible Computers,Prentice-Hall, Englewood Cliffs, NJ, 1997.Hans-Peter Messmer, The Indispensable Pentium Book, Addison-Wesley, New York, 1995.Karen Miller, An Assembly Language Introduction to Computer Architecture: Using the IntelPentium®, Oxford University Press, New York, 1999.Stephen Morse, Eric Isaacson, and Douglas Albert, The 80386/387 Architecture, John Wiley &Sons, New York, 1987.NexGen Inc., Nx586 Processor Data Book, NexGen Inc., Milpitas, CA, 1993.NexGen Inc., Nx686 Processor Data Book, NexGen Inc., Milpitas, CA, 1994.Bipin Patwardhan, Introduction to the Streaming SIMD Extensions in the Pentium® III,www.x86.org/articles/sse_pt1/ simd1.htm, June, 2000.Peter Norton, Peter Aitken, and Richard Wilton, PC Programmer’s Bible, Microsoft® Press,Redmond, WA, 1993.PharLap 386|ASM Reference Manual, Pharlap, Cambridge MA, 1993.PharLap TNT DOS-Extender Reference Manual, Pharlap, Cambridge MA, 1995.Sen-Cuo Ro and Sheau-Chuen Her, i386/i486 Advanced Programming, Van Nostrand Reinhold,New York, 1993.Jeffrey P.
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