Donald E. Thomas - The Verilog Hardware Description Language, Fifth Edition (798541), страница 61

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All rights reservedThe Verilog Hardware Description Language346parameter_override ::= defparam list_of_param_assignments ;G.3 DeclarationsG.3.1 Declaration typesG.3.1.1 Module parameter declarationslocal_parameter_declaration ::=localparam [ signed ] [ range ] list_of_param_assignments ;| localparam integer list_of_param_assignments ;| localparam real list_of_param_assignments ;| localparam realtime list_of_param_assignments ;| localparam time list_of_param_assignments ;parameter_declaration ::=parameter [ signed ] [ range ] list_of_param_assignments ;| parameter integer list_of_param_assignments ;| parameter real list_of_param_assignments ;| parameter realtime list_of_param_assignments ;| parameter time list_of_param_assignments ;specparam_declaration ::= specparam [ range ] list_of_specparam_assignments ;G.3.1.2 Port declarationsinout_declaration ::= inout [ net_type ] [ signed ] [ range ]list_of_port_identifiersinput_declaration ::= input [ net_type ] [ signed ] [ range ]list_of_port_identifiersoutput_declaration ::=output [ net_type ] [ signed ] [ range ]list_of_port_identifiers| output [ reg ] [ signed ] [ range ]list_of_port_identifiers| output reg [ signed ] [ range ]list_of_variable_port_identifiers| output [ output_variable_type ]list_of_port_identifiers| output output_variable_typeIEEE Std 1364-2001, Copyright © 2001, IEEE.

All rights reserved347list_of_variable_port_identifiersG.3.1.2 Type declarationsevent_declaration ::= event list_of_event_identifiers ;genvar_declaration ::= genvar list_of_genvar_identifiers ;integer_declaration ::= integer list_of_variable_identifiers ;net_declaration ::=net_type [ signed ][ delay3 ] list_of_net_identifiers ;| net_type [ drive_strength ] [ signed ][ delay3 ] list_of_net_decl_assignments ;| net_type [ vectored | scalared ] [ signed ]range [ delay3 ] list_of_net_identifiers ;| net_type [ drive_strength ] [ vectored | scalared ] [ signed ]range [ delay3 ] list_of_net_decl_assignments ;| trireg [ charge_strength ] [ signed ][ delay3 ] list_of_net_identifiers ;| trireg [ drive_strength ] [ signed ][ delay3 ] list_of_net_decl_assignments ;| trireg [ charge_strength ] [ vectored | scalared ] [ signed ]range [ delay3 ] list_of_net_identifiers ;| trireg [ drive_strength ] [ vectored | scalared ] [ signed ]range [ delay3 ] list_of_net_decl_assignments ;real_declaration ::= real list_of_real_identifiers ;realtime_declaration ::= realtime list_of_real_identifiers ;reg_declaration ::= reg [ signed ] [ range ]list_of_variable_identifiers ;time_declaration ::= time list_of_variable_identifiers ;G.3.1 Declaration data typesG.3.1.1 Net and variable typesnet_type ::=supply0 | supply1| tri| triand | trior | tri0 | tri1| wire| wand | woroutput_variable_type ::= integer | timereal_type ::=real_identifier [ = constant_expression ]| real_identifier dimension { dimension }IEEE Std 1364-2001, Copyright © 2001, IEEE.

All rights reservedThe Verilog Hardware Description Language348variable_type ::=variable_identifier [ = constant_expression ]| variable_identifier dimension { dimension }G.3.1.2 Strengthsdrive_strength ::=( strength0, strength1 )| ( strength1, strength0 )| (strength0, highz1 )| ( strength1, highz0)| ( highz0 , strength1 )| (highz1, strength0 )strength0 ::= supply0 | strong0 | pull0 | weak0strength1 ::= supply 1| strong1 | pull1 | weak1charge_strength ::= (small) | (medium) | (large)G.3.1.3 Delaysdelay3 ::= # delay_value | # (delay_value [ , delay_value [ , delay_value ] ] )delay2 ::= # delay_value | # ( delay_value [ , delay_value ])delay_value ::=unsigned_number| parameter_identifier| specparam_identifier| mintypmax_expressionG.3.2 Declaration listslist_of_event_identifiers ::= event_identifier [ dimension { dimension }]{, event_identifier [ dimension { dimension }] }list_of_genvar_identifiers ::= genvar_identifier {, genvar_identifier }list_of_net_decl_assignments ::= net_decl_assignment {, net_decl_assignment}list_of_net_identifiers ::= net_identifier [ dimension { dimension }]{, net_identifier [ dimension { dimension }]}list_of_param_assignments ::=param_assignment {, param_assignment}list_of_port_identifiers ::= port_identifier {, port_identifier}list_of_real_identifiers ::= real_type {, real_type }list_of_specparam_assignments ::=specparam_assignment {, specparam_assignment}list_of_variable_identifiers ::= variable_type {, variable_type }list_of_variable_port_identifiers ::= port_identifier [ = constant_expression ]IEEE Std 1364-2001, Copyright © 2001, IEEE.

All rights reserved349{ , port_identifier [ = constant_expression ] }G.3.3 Declaration assignmentsnet_decl_assignment ::= net_identifier = expressionparam_assignment ::= parameter_identifier = constant_expressionspecparam_assignment ::=specparam_identifier = constant_mintypmax_expression| pulse_control_specparampulse_control_specparam ::=PATHPULSE$ = ( reject_limit_value [ , error_limit_value ] ) ;| PATHPULSE$specify_input_terminal_descriptor$specify_output_terminal_descriptor= ( reject_limit_value [ , error_limit_value ] ) ;error_limit_value ::= limit_valuereject_limit_value ::= limit_valuelimit_value ::= constant_mintypmax_expressionG.3.4 Declaration rangesdimension ::= [ dimension_constant_expression : dimension_constant_expression ]range ::= [ msb_constant_expression : lsb_constant_expression ]G.3.5 Function declarationsfunction_declaration ::=function [ automatic ] [ signed ] [ range_or_type ] function_identifier ;function_item_declaration { function_item_declaration }function_statementendfunction| function [ automatic ] [ signed ] [ range_or_type ] function_identifier (function_port_list ) ;block_item_declaration { block_item_declaration }function_statementendfunctionfunction_item_declaration ::=block_item_declaration| tf_input_declaration ;function_port_list ::= { attribute_instance } tf_input_declaration { , { attribute_instance }tf_input_declaration }range_or_type ::= range | integer | real | realtime | timeIEEE Std 1364-2001, Copyright © 2001, IEEE.

All rights reservedThe Verilog Hardware Description Language350G.3.6 Task declarationstask_declaration ::=task [ automatic ] task_identifier ;{ task_item_declaration }statementendtask| task [ automatic ] task_identifier ( task_port_list ) ;{ block_item_declaration }statementendtasktask_item_declaration ::=block_item_declaration| { attribute_instance } tf_input_declaration ;| { attribute_instance } tf_output_declaration ;| { attribute_instance } tf_inout_declaration ;task_port_list ::= task_port_item { , task_port_item }task_port_item ::={ attribute_instance } tf_input_declaration| { attribute_instance } tf_output_declaration| { attribute_instance } tf_inout_declarationtf_input_declaration ::=input [ reg ] [ signed ] [ range ] list_of_port_identifiers| input [ task_port_type ] list_of_port_identifierstf_output_declaration ::=output [ reg ] [ signed ] [ range ] list_of_port_identifiers| output [ task_port_type ] list_of_port_identifierstf_inout_declaration ::=inout [ reg ] [ signed ] [ range ] list_of_port_identifiers| inout [ task_port_type ] list_of_port_identifierstask_port_type ::=time | real | realtime | integerG.3.7 Block item declarationsblock_item_declaration ::={ attribute_instance } block_reg_declaration| { attribute_instance } event_declaration| { attribute_instance } integer_declaration| { attribute_instance } local_parameter_declaration| { attribute_instance } parameter_declaration| { attribute_instance } real_declarationIEEE Std 1364-2001, Copyright © 2001, IEEE.

All rights reserved351| { attribute_instance } realtime_declaration| { attribute_instance } time_declarationblock_reg_declaration ::= reg [ signed ] [ range ]list_of_block_variable_identifiers ;list_of_block_variable_identifiers::=block_variable_type { , block_variable_type }block_variable_type ::=variable_identifier| variable_identifier dimension { dimension }G.4 Primitive instancesG.4.1 Primitive instantiation and instancesgate_instantiation ::=cmos_switchtype [delay3]cmos_switch_instance { , cmos_switch_instance } ;| enable_gatetype [drive_strength] [delay3]enable_gate_instance { , enable_gate_instance } ;| mos_switchtype [delay3]mos_switch_instance { , mos_switch_instance } ;| n_input_gatetype [drive_strength] [delay2]n_input_gate_instance { , n_input_gate_instance } ;| n_output_gatetype [drive_strength] [delay2]n_output_gate_instance { , n_output_gate_instance } ;| pass_en_switchtype [delay2]pass_enable_switch_instance { , pass_enable_switch_instance } ;| pass_switchtypepass_switch_instance { , pass_switch_instance } ;| pulldown [pulldown_strength]pull_gate_instance { , pull_gate_instance } ;| pullup [pullup_strength]pull_gate_instance { , pull_gate_instance } ;cmos_switch_instance ::= [ name_of_gate_instance ] ( output_terminal ,input_terminal ,ncontrol_terminal , pcontrol_terminal )enable_gate_instance ::= [ name_of_gate_instance ] ( output_terminal , input_terminal, enable_terminal )mos_switch_instance ::= [ name_of_gate_instance ] ( output_terminal , input_terminalIEEE Std 1364-2001, Copyright © 2001, IEEE.

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