Volume 2B Instruction Set Reference N-Z (794102), страница 4
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2B 4-21INSTRUCTION SET REFERENCE, N-Z#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.Real-Address Mode Exceptions#GPIf a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.#SSIf a memory operand effective address is outside the SSsegment limit.#UDIf the LOCK prefix is used.Virtual-8086 Mode Exceptions#GP(0)If any of the I/O permission bits in the TSS for the I/O port beingaccessed is 1.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made.#UDIf the LOCK prefix is used.Compatibility Mode ExceptionsSame as for protected mode exceptions.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a noncanonical form.#GP(0)If the CPL is greater than (has less privilege) the I/O privilegelevel (IOPL) and any of the corresponding I/O permission bits inTSS for the I/O port being accessed is 1.#PF(fault-code)If a page fault occurs.#AC(0)If alignment checking is enabled and an unaligned memoryreference is made while the current privilege level is 3.#UDIf the LOCK prefix is used.If the memory address is in a non-canonical form.4-22 Vol.
2BOUTS/OUTSB/OUTSW/OUTSD—Output String to PortINSTRUCTION SET REFERENCE, N-ZPABSB/PABSW/PABSD — Packed Absolute Value64-BitModeCompat/Leg ModeValidValidCompute the absolute value ofbytes in mm2/m64 and storeUNSIGNED result in mm1.66 0F 38 1C /r PABSB xmm1,xmm2/m128ValidValidCompute the absolute value ofbytes in xmm2/m128 and storeUNSIGNED result in xmm1.0F 38 1D /rValidValidCompute the absolute value of 16bit integers in mm2/m64 and storeUNSIGNED result in mm1.66 0F 38 1D /r PABSW xmm1,xmm2/m128ValidValidCompute the absolute value of 16bit integers in xmm2/m128 andstore UNSIGNED result in xmm1.0F 38 1E /rValidValidCompute the absolute value of 32bit integers in mm2/m64 and storeUNSIGNED result in mm1.ValidValidCompute the absolute value of 32bit integers in xmm2/m128 andstore UNSIGNED result in xmm1.OpcodeInstruction0F 38 1C /rPABSB mm1,mm2/m64PABSW mm1,mm2/m64PABSD mm1,mm2/m6466 0F 38 1E /r PABSD xmm1,xmm2/m128DescriptionDescriptionPABSB/W/D computes the absolute value of each data element of the source operand(the second operand) and stores the UNSIGNED results in the destination operand(the first operand).
PABSB operates on signed bytes, PABSW operates on 16-bitwords, and PABSD operates on signed 32-bit integers. The source operand can be anMMX register or a 64-bit memory location, or it can be an XMM register or a 128-bitmemory location. The destination operand can be an MMX or an XMM register. Bothoperands can be MMX register or XMM registers. When the source operand is a128-bit memory operand, the operand must be aligned on a 16byte boundary or ageneral-protection exception (#GP) will be generated.In 64-bit mode, use the REX prefix to access additional registers.OperationPABSB with 64 bit operandsUnsigned DEST[7:0] ← ABS(SRC[7:0])Repeat operation for 2nd through 7th bytesUnsigned DEST[63:56] ← ABS(SRC[63:56])PABSB/PABSW/PABSD — Packed Absolute ValueVol.
2B 4-23INSTRUCTION SET REFERENCE, N-ZPABSB with 128 bit operands:Unsigned DEST[7:0] ← ABS(SRC[7:.0])Repeat operation for 2nd through 15th bytesUnsigned DEST[127:120] ← ABS(SRC[127:120])PABSW with 64 bit operands:Unsigned DEST[15:0] ← ABS(SRC[15:0])Repeat operation for 2nd through 3rd 16-bit wordsUnsigned DEST[63:48] ← ABS(SRC[63:48])PABSW with 128 bit operands:Unsigned DEST[15:0] ← ABS(SRC[15:0])Repeat operation for 2nd through 7th 16-bit wordsUnsigned DEST[127:112] ← ABS(SRC[127:112])PABSD with 64 bit operands:Unsigned DEST[31:0] ← ABS(SRC[31:0])Unsigned DEST[63:32] ← ABS(SRC[63:32])PABSD with 128 bit operands:Unsigned DEST[31:0] ← ABS(SRC[31:0])Repeat operation for 2nd through 3rd 32-bit double wordsUnsigned DEST[127:96] ← ABS(SRC[127:96])Intel C/C++ Compiler Intrinsic EquivalentsPABSB__m64 _mm_abs_pi8 (__m64 a)PABSB__m128i _mm_abs_epi8 (__m128i a)PABSW__m64 _mm_abs_pi16 (__m64 a)PABSW__m128i _mm_abs_epi16 (__m128i a)PABSD__m64 _mm_abs_pi32 (__m64 a)PABSD__m128i _mm_abs_epi32 (__m128i a)Protected Mode Exceptions#GP(0):If a memory operand effective address is outside the CS, DS,ES, FS or GS segments.(128-bit operations only) If not aligned on 16-byte boundary,regardless of segment.#SS(0)4-24 Vol.
2BIf a memory operand effective address is outside the SSsegment limit.PABSB/PABSW/PABSD — Packed Absolute ValueINSTRUCTION SET REFERENCE, N-Z#PF(fault-code)If a page fault occurs.#UDIf CR0.EM = 1.(128-bit operations only) If CR4.OSFXSR(bit 9) = 0.If CPUID.SSSE3(ECX bit 9) = 0.If the LOCK prefix is used.#NMIf TS bit in CR0 is set.#MF(64-bit operations only) If there is a pending x87 FPU exception.#AC(0)(64-bit operations only) If alignment checking is enabled andunaligned memory reference is made while the current privilegelevel is 3.Real Mode Exceptions#GP(0):If any part of the operand lies outside of the effective addressspace from 0 to 0FFFFH.(128-bit operations only) If not aligned on 16-byte boundary,regardless of segment.#UD:If CR0.EM = 1.(128-bit operations only) If CR4.OSFXSR(bit 9) = 0.If CPUID.SSSE3(ECX bit 9) = 0.If the LOCK prefix is used.#NMIf TS bit in CR0 is set.#MF(64-bit operations only) If there is a pending x87 FPU exception.Virtual 8086 Mode ExceptionsSame exceptions as in real address mode.#PF(fault-code)If a page fault occurs.#AC(0)(64-bit operations only) If alignment checking is enabled andunaligned memory reference is made.Compatibility Mode ExceptionsSame as for protected mode exceptions.64-Bit Mode Exceptions#SS(0)If a memory address referencing the SS segment is in a noncanonical form.#GP(0)If the memory address is in a non-canonical form.(128-bit operations only) If memory operand is not aligned on a16-byte boundary, regardless of segment.#UDIf CR0.EM[bit 2] = 1.PABSB/PABSW/PABSD — Packed Absolute ValueVol.
2B 4-25INSTRUCTION SET REFERENCE, N-Z(128-bit operations only) If CR4.OSFXSR[bit 9] = 0.If CPUID.01H:ECX.SSSE3[bit 9] = 0.If the LOCK prefix is used.#NMIf CR0.TS[bit 3] = 1.#MF(64-bit operations only) If there is a pending x87 FPU exception.#PF(fault-code)If a page fault occurs.#AC(0)(64-bit operations only) If alignment checking is enabled and anunaligned memory reference is made while the current privilegelevel is 3.4-26 Vol. 2BPABSB/PABSW/PABSD — Packed Absolute ValueINSTRUCTION SET REFERENCE, N-ZPACKSSWB/PACKSSDW—Pack with Signed SaturationOpcodeInstruction64-BitModeCompat/Leg ModeDescription0F 63 /rPACKSSWB mm1,mm2/m64ValidValidConverts 4 packed signed wordintegers from mm1 and frommm2/m64 into 8 packed signedbyte integers in mm1 using signedsaturation.66 0F 63 /rPACKSSWB xmm1,xmm2/m128ValidValidConverts 8 packed signed wordintegers from xmm1 and fromxxm2/m128 into 16 packed signedbyte integers in xxm1 using signedsaturation.0F 6B /rPACKSSDW mm1,mm2/m64ValidValidConverts 2 packed signeddoubleword integers from mm1 andfrom mm2/m64 into 4 packedsigned word integers in mm1 usingsigned saturation.66 0F 6B /rPACKSSDW xmm1,xmm2/m128ValidValidConverts 4 packed signeddoubleword integers from xmm1and from xxm2/m128 into 8 packedsigned word integers in xxm1 usingsigned saturation.DescriptionConverts packed signed word integers into packed signed byte integers (PACKSSWB)or converts packed signed doubleword integers into packed signed word integers(PACKSSDW), using saturation to handle overflow conditions.
See Figure 4-1 for anexample of the packing operation.64-Bit SRCD64-Bit DESTCBD’C’B’AA’64-Bit DESTFigure 4-1. Operation of the PACKSSDW Instruction Using 64-bit OperandsThe PACKSSWB instruction converts 4 or 8 signed word integers from the destinationoperand (first operand) and 4 or 8 signed word integers from the source operandPACKSSWB/PACKSSDW—Pack with Signed SaturationVol. 2B 4-27INSTRUCTION SET REFERENCE, N-Z(second operand) into 8 or 16 signed byte integers and stores the result in the destination operand.
If a signed word integer value is beyond the range of a signed byteinteger (that is, greater than 7FH for a positive integer or greater than 80H for anegative integer), the saturated signed byte integer value of 7FH or 80H, respectively, is stored in the destination.The PACKSSDW instruction packs 2 or 4 signed doublewords from the destinationoperand (first operand) and 2 or 4 signed doublewords from the source operand(second operand) into 4 or 8 signed words in the destination operand (seeFigure 4-1).
If a signed doubleword integer value is beyond the range of a signedword (that is, greater than 7FFFH for a positive integer or greater than 8000H for anegative integer), the saturated signed word integer value of 7FFFH or 8000H,respectively, is stored into the destination.The PACKSSWB and PACKSSDW instructions operate on either 64-bit or 128-bitoperands. When operating on 64-bit operands, the destination operand must be anMMX technology register and the source operand can be either an MMX technologyregister or a 64-bit memory location. When operating on 128-bit operands, the destination operand must be an XMM register and the source operand can be either anXMM register or a 128-bit memory location.In 64-bit mode, using a REX prefix in the form of REX.R permits this instruction toaccess additional registers (XMM8-XMM15).OperationPACKSSWB instruction with 64-bit operands:DEST[7:0] ← SaturateSignedWordToSignedByte DEST[15:0];DEST[15:8] ← SaturateSignedWordToSignedByte DEST[31:16];DEST[23:16] ← SaturateSignedWordToSignedByte DEST[47:32];DEST[31:24] ← SaturateSignedWordToSignedByte DEST[63:48];DEST[39:32] ← SaturateSignedWordToSignedByte SRC[15:0];DEST[47:40] ← SaturateSignedWordToSignedByte SRC[31:16];DEST[55:48] ← SaturateSignedWordToSignedByte SRC[47:32];DEST[63:56] ← SaturateSignedWordToSignedByte SRC[63:48];PACKSSDW instruction with 64-bit operands:DEST[15:0] ← SaturateSignedDoublewordToSignedWord DEST[31:0];DEST[31:16] ← SaturateSignedDoublewordToSignedWord DEST[63:32];DEST[47:32] ← SaturateSignedDoublewordToSignedWord SRC[31:0];DEST[63:48] ← SaturateSignedDoublewordToSignedWord SRC[63:32];PACKSSWB instruction with 128-bit operands:DEST[7:0]← SaturateSignedWordToSignedByte (DEST[15:0]);DEST[15:8] ← SaturateSignedWordToSignedByte (DEST[31:16]);DEST[23:16] ← SaturateSignedWordToSignedByte (DEST[47:32]);DEST[31:24] ← SaturateSignedWordToSignedByte (DEST[63:48]);DEST[39:32] ← SaturateSignedWordToSignedByte (DEST[79:64]);4-28 Vol.
2BPACKSSWB/PACKSSDW—Pack with Signed SaturationINSTRUCTION SET REFERENCE, N-ZDEST[47:40] ← SaturateSignedWordToSignedByte (DEST[95:80]);DEST[55:48] ← SaturateSignedWordToSignedByte (DEST[111:96]);DEST[63:56] ← SaturateSignedWordToSignedByte (DEST[127:112]);DEST[71:64] ← SaturateSignedWordToSignedByte (SRC[15:0]);DEST[79:72] ← SaturateSignedWordToSignedByte (SRC[31:16]);DEST[87:80] ← SaturateSignedWordToSignedByte (SRC[47:32]);DEST[95:88] ← SaturateSignedWordToSignedByte (SRC[63:48]);DEST[103:96] ← SaturateSignedWordToSignedByte (SRC[79:64]);DEST[111:104] ← SaturateSignedWordToSignedByte (SRC[95:80]);DEST[119:112] ← SaturateSignedWordToSignedByte (SRC[111:96]);DEST[127:120] ← SaturateSignedWordToSignedByte (SRC[127:112]);PACKSSDW instruction with 128-bit operands:DEST[15:0] ← SaturateSignedDwordToSignedWord (DEST[31:0]);DEST[31:16] ← SaturateSignedDwordToSignedWord (DEST[63:32]);DEST[47:32] ← SaturateSignedDwordToSignedWord (DEST[95:64]);DEST[63:48] ← SaturateSignedDwordToSignedWord (DEST[127:96]);DEST[79:64] ← SaturateSignedDwordToSignedWord (SRC[31:0]);DEST[95:80] ← SaturateSignedDwordToSignedWord (SRC[63:32]);DEST[111:96] ← SaturateSignedDwordToSignedWord (SRC[95:64]);DEST[127:112] ← SaturateSignedDwordToSignedWord (SRC[127:96]);Intel C/C++ Compiler Intrinsic EquivalentsPACKSSWB__m64 _mm_packs_pi16(__m64 m1, __m64 m2)PACKSSDW__m64 _mm_packs_pi32 (__m64 m1, __m64 m2)Flags AffectedNone.Protected Mode Exceptions#GP(0)If a memory operand effective address is outside the CS, DS,ES, FS, or GS segment limit.(128-bit operations only) If a memory operand is not aligned ona 16-byte boundary, regardless of segment.#SS(0)#UDIf a memory operand effective address is outside the SSsegment limit.If CR0.EM[bit 2] = 1.(128-bit operations only) If CR4.OSFXSR[bit 9] = 0.If the LOCK prefix is used.#NMIf CR0.TS[bit 3] = 1.#MF(64-bit operations only) If there is a pending x87 FPU exception.PACKSSWB/PACKSSDW—Pack with Signed SaturationVol.
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