Volume 1 Basic Architecture (794100), страница 45
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If a decimal carry occurred as a result of the addition, the CF flag is set andthe contents of the AH register are incremented by 1.The AAS instruction adjusts the contents of the AL register following the subtractionof two unpacked BCD values. Here again, a binary value is converted into anunpacked BCD value. If a borrow was required to complete the decimal subtract, theCF flag is set and the contents of the AH register are decremented by 1.The AAM instruction adjusts the contents of the AL register following a multiplicationof two unpacked BCD values.
It converts the binary value in the AL register into adecimal value and stores the least significant digit of the result in the AL register (inunpacked BCD format) and the most significant digit, if there is one, in the AHregister (also in unpacked BCD format).The AAD instruction adjusts a two-digit BCD value so that when the value is dividedwith the DIV instruction, a valid unpacked BCD result is obtained.
The instructionconverts the BCD value in registers AH (most significant digit) and AL (least significant digit) into a binary value and stores the result in register AL. When the value inAL is divided by an unpacked BCD value, the quotient and remainder will be automatically encoded in unpacked BCD format.7-14 Vol. 1PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS7.3.4Decimal Arithmetic Instructions in 64-Bit ModeDecimal arithmetic instructions are not supported in 64-bit mode, They are eitherinvalid or not encodable.7.3.5Logical InstructionsThe logical instructions AND, OR, XOR (exclusive or), and NOT perform the standardBoolean operations for which they are named.
The AND, OR, and XOR instructionsrequire two operands; the NOT instruction operates on a single operand.7.3.6Shift and Rotate InstructionsThe shift and rotate instructions rearrange the bits within an operand. For thepurpose of this discussion, these instructions are further divided subordinatesubgroups of instructions that:•••Shift bitsDouble-shift bits (move them between operands)Rotate bits7.3.6.1Shift InstructionsThe SAL (shift arithmetic left), SHL (shift logical left), SAR (shift arithmetic right),SHR (shift logical right) instructions perform an arithmetic or logical shift of the bitsin a byte, word, or doubleword.The SAL and SHL instructions perform the same operation (see Figure 7-6).
Theyshift the source operand left by from 1 to 31 bit positions. Empty bit positions arecleared. The CF flag is loaded with the last bit shifted out of the operand.Vol. 1 7-15PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONSInitial StateOperandCFX1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1After 1-bit SHL/SAL Instruction010 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 0After 10-bit SHL/SAL Instruction000 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0Figure 7-6.
SHL/SAL Instruction OperationThe SHR instruction shifts the source operand right by from 1 to 31 bit positions (seeFigure 7-7). As with the SHL/SAL instruction, the empty bit positions are cleared andthe CF flag is loaded with the last bit shifted out of the operand.Initial StateOperand1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1 1CFXAfter 1-bit SHR Instruction0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 110After 10-bit SHR Instruction0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 00Figure 7-7. SHR Instruction Operation7-16 Vol. 10PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONSThe SAR instruction shifts the source operand right by from 1 to 31 bit positions (seeFigure 7-8). This instruction differs from the SHR instruction in that it preserves thesign of the source operand by clearing empty bit positions if the operand is positive orsetting the empty bits if the operand is negative.
Again, the CF flag is loaded with thelast bit shifted out of the operand.The SAR and SHR instructions can also be used to perform division by powers of2 (see “SAL/SAR/SHL/SHR—Shift Instructions” in Chapter 4, “Instruction Set Reference, N-Z,” of the Intel® 64 and IA-32 Architectures Software Developer’s Manual,Volume 2B).Initial State (Positive Operand)Operand0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 1CFXAfter 1-bit SAR Instruction0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1Initial State (Negative Operand)1 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 1 11CFXAfter 1-bit SAR Instruction1 1 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 11Figure 7-8.
SAR Instruction Operation7.3.6.2Double-Shift InstructionsThe SHLD (shift left double) and SHRD (shift right double) instructions shift a specified number of bits from one operand to another (see Figure 7-9). They are providedto facilitate operations on unaligned bit strings. They can also be used to implement avariety of bit string move operations.Vol. 1 7-17PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONSSHLD Instruction31CF0Destination (Memory or Register)310Source (Register)SHRD Instruction310Source (Register)310Destination (Memory or Register)CFFigure 7-9.
SHLD and SHRD Instruction OperationsThe SHLD instruction shifts the bits in the destination operand to the left and fills theempty bit positions (in the destination operand) with bits shifted out of the sourceoperand. The destination and source operands must be the same length (eitherwords or doublewords). The shift count can range from 0 to 31 bits. The result of thisshift operation is stored in the destination operand, and the source operand is notmodified. The CF flag is loaded with the last bit shifted out of the destination operand.The SHRD instruction operates the same as the SHLD instruction except bits areshifted to the right in the destination operand, with the empty bit positions filled withbits shifted out of the source operand.7.3.6.3Rotate InstructionsThe ROL (rotate left), ROR (rotate right), RCL (rotate through carry left) and RCR(rotate through carry right) instructions rotate the bits in the destination operand outof one end and back through the other end (see Figure 7-10).
Unlike a shift, no bitsare lost during a rotation. The rotate count can range from 0 to 31.7-18 Vol. 1PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS31CFROL Instruction0Destination (Memory or Register)31ROR Instruction0Destination (Memory or Register)31CFRCL InstructionCF0Destination (Memory or Register)31RCR Instruction0Destination (Memory or Register)CFFigure 7-10. ROL, ROR, RCL, and RCR Instruction OperationsThe ROL instruction rotates the bits in the operand to the left (toward more significant bit locations). The ROR instruction rotates the operand right (toward less significant bit locations).The RCL instruction rotates the bits in the operand to the left, through the CF flag.This instruction treats the CF flag as a one-bit extension on the upper end of theoperand. Each bit that exits from the most significant bit location of the operandmoves into the CF flag. At the same time, the bit in the CF flag enters the least significant bit location of the operand.The RCR instruction rotates the bits in the operand to the right through the CF flag.For all the rotate instructions, the CF flag always contains the value of the last bitrotated out of the operand, even if the instruction does not use the CF flag as anextension of the operand.
The value of this flag can then be tested by a conditionaljump instruction (JC or JNC).Vol. 1 7-19PROGRAMMING WITH GENERAL-PURPOSE INSTRUCTIONS7.3.7Bit and Byte InstructionsThese instructions operate on bit or byte strings. For the purpose of this discussion,they are further divided subordinate subgroups that:••••Test and modify a single bitScan a bit stringSet a byte given conditionsTest operands and report results7.3.7.1Bit Test and Modify InstructionsThe bit test and modify instructions (see Table 7-3) operate on a single bit, which canbe in an operand. The location of the bit is specified as an offset from the least significant bit of the operand. When the processor identifies the bit to be tested and modified, it first loads the CF flag with the current value of the bit. Then it assigns a newvalue to the selected bit, as determined by the modify operation for the instruction.Table 7-3.
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