Volume 1 Basic Architecture (794100), страница 28
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Binary Real Number SystemSignExponentSignificandFractionInteger or J-BitFigure 4-11. Binary Floating-Point FormatTable 4-5. Real and Floating-Point Number NotationNotationValueVol. 1 4-15DATA TYPESTable 4-5. Real and Floating-Point Number NotationOrdinary Decimal178.125Scientific Decimal1.78125E102Scientific Binary1.0110010001E2111Scientific Binary(Biased Exponent)1.0110010001E210000110IEEE Single-Precision FormatSignBiased ExponentNormalized Significand010000110011001000100000000000001.
(Implied)4.8.2.1Normalized NumbersIn most cases, floating-point numbers are encoded in normalized form. This meansthat except for zero, the significand is always made up of an integer of 1 and thefollowing fraction:1.fff...ffFor values less than 1, leading zeros are eliminated. (For each leading zero eliminated, the exponent is decremented by one.)Representing numbers in normalized form maximizes the number of significant digitsthat can be accommodated in a significand of a given width.
To summarize, a normalized real number consists of a normalized significand that represents a real numberbetween 1 and 2 and an exponent that specifies the number’s binary point.4.8.2.2Biased ExponentIn the IA-32 architecture, the exponents of floating-point numbers are encoded in abiased form. This means that a constant is added to the actual exponent so that thebiased exponent is always a positive number. The value of the biasing constantdepends on the number of bits available for representing exponents in the floatingpoint format being used.
The biasing constant is chosen so that the smallest normalized number can be reciprocated without overflow.See Section 4.2.2, “Floating-Point Data Types,” for a list of the biasing constants thatthe IA-32 architecture uses for the various sizes of floating-point data-types.4.8.3Real Number and Non-number EncodingsA variety of real numbers and special values can be encoded in the IEEE Standard754 floating-point format.
These numbers and values are generally divided into thefollowing classes:4-16 Vol. 1DATA TYPES••••••Signed zerosDenormalized finite numbersNormalized finite numbersSigned infinitiesNaNsIndefinite numbers(The term NaN stands for “Not a Number.”)Figure 4-12 shows how the encodings for these numbers and non-numbers fit intothe real number continuum. The encodings shown here are for the IEEE single-precision floating-point format. The term “S” indicates the sign bit, “E” the biased exponent, and “Sig” the significand. The exponent values are given in decimal. Theinteger bit is shown for the significands, even though the integer bit is implied insingle-precision floating-point format.NaNNaN− Denormalized Finite + Denormalized Finite−∞S1E010− Normalized Finite− 0+ 0+ Normalized Finite + ∞Real Number and NaN Encodings For 32-Bit Floating-Point FormatESig1Sig1S0.000...0.000...−00+0 00.XXX...2− DenormalizedFinite1 1...2541.XXX...− NormalizedFinite11.000...−∞+∞X3 2551.0XX...2SNaNSNaN X3 2551.0XX...2X3 2551.1XX...QNaNQNaN X3 2551.1XX...255+DenormalizedFinite 000.XXX...2+Normalized 0 1...254 1.XXX...Finite02551.000...NOTES:1.
Integer bit of fraction implied forsingle-precision floating-point format.2. Fraction must be non-zero.3. Sign bit ignored.Figure 4-12. Real Numbers and NaNsAn IA-32 processor can operate on and/or return any of these values, depending onthe type of computation being performed. The following sections describe thesenumber and non-number classes.Vol. 1 4-17DATA TYPES4.8.3.1Signed ZerosZero can be represented as a +0 or a −0 depending on the sign bit. Both encodingsare equal in value. The sign of a zero result depends on the operation beingperformed and the rounding mode being used.
Signed zeros have been provided toaid in implementing interval arithmetic. The sign of a zero may indicate the directionfrom which underflow occurred, or it may indicate the sign of an ∞ that has beenreciprocated.4.8.3.2Normalized and Denormalized Finite NumbersNon-zero, finite numbers are divided into two classes: normalized and denormalized.The normalized finite numbers comprise all the non-zero finite values that can beencoded in a normalized real number format between zero and ∞.
In the single-precision floating-point format shown in Figure 4-12, this group of numbers includes allthe numbers with biased exponents ranging from 1 to 25410 (unbiased, the exponentrange is from −12610 to +12710).When floating-point numbers become very close to zero, the normalized-numberformat can no longer be used to represent the numbers. This is because the range ofthe exponent is not large enough to compensate for shifting the binary point to theright to eliminate leading zeros.When the biased exponent is zero, smaller numbers can only be represented bymaking the integer bit (and perhaps other leading bits) of the significand zero. Thenumbers in this range are called denormalized (or tiny) numbers.
The use ofleading zeros with denormalized numbers allows smaller numbers to be represented.However, this denormalization causes a loss of precision (the number of significantbits in the fraction is reduced by the leading zeros).When performing normalized floating-point computations, an IA-32 processornormally operates on normalized numbers and produces normalized numbers asresults. Denormalized numbers represent an underflow condition. The exact conditions are specified in Section 4.9.1.5, “Numeric Underflow Exception (#U).”A denormalized number is computed through a technique called gradual underflow.Table 4-6 gives an example of gradual underflow in the denormalization process.Here the single-precision format is being used, so the minimum exponent (unbiased)is −12610. The true result in this example requires an exponent of −12910 in order tohave a normalized number.
Since −12910 is beyond the allowable exponent range,the result is denormalized by inserting leading zeros until the minimum exponent of−12610 is reached.4-18 Vol. 1DATA TYPESTable 4-6. Denormalization ProcessOperationSignExponent*SignificandTrue Result0−1291.01011100000...00Denormalize0−1280.10101110000...00Denormalize0−1270.01010111000...00Denormalize0−1260.00101011100...00Denormal Result0−1260.00101011100...00* Expressed as an unbiased, decimal number.In the extreme case, all the significant bits are shifted out to the right by leadingzeros, creating a zero result.The Intel 64 and IA-32 architectures deal with denormal values in the following ways:••It avoids creating denormals by normalizing numbers whenever possible.•It provides the floating-point denormal-operand exception to permit proceduresor programs to detect when denormals are being used as source operands forcomputations.It provides the floating-point underflow exception to permit programmers todetect cases when denormals are created.4.8.3.3Signed InfinitiesThe two infinities, + ∞ and − ∞, represent the maximum positive and negative realnumbers, respectively, that can be represented in the floating-point format.
Infinityis always represented by a significand of 1.00...00 (the integer bit may be implied)and the maximum biased exponent allowed in the specified format (for example,25510 for the single-precision format).The signs of infinities are observed, and comparisons are possible. Infinities arealways interpreted in the affine sense; that is, –∞ is less than any finite number and+∞ is greater than any finite number. Arithmetic on infinities is always exact. Exceptions are generated only when the use of an infinity as a source operand constitutesan invalid operation.Whereas denormalized numbers may represent an underflow condition, the two ∞numbers may represent the result of an overflow condition. Here, the normalizedresult of a computation has a biased exponent greater than the largest allowableexponent for the selected result format.4.8.3.4NaNsSince NaNs are non-numbers, they are not part of the real number line.
InFigure 4-12, the encoding space for NaNs in the floating-point formats is shownVol. 1 4-19DATA TYPESabove the ends of the real number line. This space includes any value with themaximum allowable biased exponent and a non-zero fraction (the sign bit is ignoredfor NaNs).The IA-32 architecture defines two classes of NaNs: quiet NaNs (QNaNs) andsignaling NaNs (SNaNs).
A QNaN is a NaN with the most significant fraction bit set;an SNaN is a NaN with the most significant fraction bit clear. QNaNs are allowed topropagate through most arithmetic operations without signaling an exception.SNaNs generally signal a floating-point invalid-operation exception whenever theyappear as operands in arithmetic operations.SNaNs are typically used to trap or invoke an exception handler. They must beinserted by software; that is, the processor never generates an SNaN as a result of afloating-point operation.4.8.3.5Operating on SNaNs and QNaNsWhen a floating-point operation is performed on an SNaN and/or a QNaN, the resultof the operation is either a QNaN delivered to the destination operand or the generation of a floating-point invalid operating exception, depending on the following rules:•If one of the source operands is an SNaN and the floating-point invalid-operatingexception is not masked (see Section 4.9.1.1, “Invalid Operation Exception(#I)”), the a floating-point invalid-operation exception is signaled and no result isstored in the destination operand.•If either or both of the source operands are NaNs and floating-point invalidoperation exception is masked, the result is as shown in Table 4-7.
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