Volume 1 Application Programming (794095), страница 45
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The elements are taken from the low half of the sourceoperands. In this register image, elements from operand2 are placed to the left of elements fromoperand1.operand 1127operand 20127127result00513-159.epsFigure 4-33. UNPCKLPS Unpack and Interleave OperationShuffle. These instructions reorder the elements of a vector.•SHUFPS—Shuffle Packed Single-Precision Floating-Point128-Bit Media and Scientific Programming165AMD64 Technology•24592—Rev. 3.13—July 2007SHUFPD—Shuffle Packed Double-Precision Floating-PointThe SHUFPS instruction moves any two of the four single-precision floating-point values in the firstoperand to the low-order quadword of the destination and moves any two of the four single-precisionfloating-point values in the second operand to the high-order quadword of the destination. In eachcase, the value of the destination is determined by a field in the immediate-byte operand.Figure 4-34 on page 166 shows the SHUFPS shuffle operation.
SHUFPS is useful, for example, incolor imaging when computing alpha saturation of RGB values. In this case, SHUFPS can replicate analpha value in a register so that parallel comparisons with three RGB values can be performed.operand 1127operand 201270imm8muxmux1270result513-160.epsFigure 4-34. SHUFPS Shuffle OperationThe SHUFPD instruction moves either of the two double-precision floating-point values in the firstoperand to the low-order quadword of the destination and moves either of the two double-precisionfloating-point values in the second operand to the high-order quadword of the destination.4.6.5 ArithmeticThe floating-point vector-arithmetic instructions perform an arithmetic operation on two floatingpoint operands.Addition• ADDPS—Add Packed Single-Precision Floating-Point• ADDPD— Add Packed Double-Precision Floating-Point• ADDSS—Add Scalar Single-Precision Floating-Point• ADDSD—Add Scalar Double-Precision Floating-Point166128-Bit Media and Scientific Programming24592—Rev.
3.13—July 2007AMD64 TechnologyThe ADDPS instruction adds each of four single-precision floating-point values in the first operand tothe corresponding single-precision floating-point values in the second operand and writes the result inthe corresponding quadword of the destination.
The ADDPD instruction performs an analogousoperation for two double-precision floating-point values.Figure 4-35 on page 167 shows a typical arithmetic operation on vectors of floating-point singleprecision elements—in this case an ADDPS instruction. The instruction performs four arithmeticoperations in parallel.operand 1operand 21270127FP single FP single FP single FP single.0FP single FP single FP single FP single...operationoperation..FP single FP single FP single FP single127result0513-164.epsFigure 4-35. ADDPS Arithmetic OperationThe ADDSS instruction adds the single-precision floating-point value in the low-order doubleword ofthe first operand to the single-precision floating-point value in the low-order doubleword of the secondoperand and writes the result in the low-order doubleword of the destination.
The three high-orderdoublewords of the destination are not modified.The ADDSD instruction adds the double-precision floating-point value in the low-order quadword ofthe first operand to the double-precision floating-point value in the low-order quadword of the secondoperand and writes the result in the low-order quadword of the destination.
The high-order quadwordof the destination is not modified.Horizontal Addition• HADDPS—Horizontal Add Packed Single-Precision Floating-Point• HADDPD—Horizontal Subtract Packed Double-Precision Floating-PointThe HADDPS instruction adds the single-precision floating point values in the first and seconddoublewords of the destination operand and stores the sum in the first doubleword of the destinationoperand. It adds the single-precision floating point values in the third and fourth doublewords of thedestination operand and stores the sum in the second doubleword of the destination operand. It addsthe single-precision floating point values in the first and second doublewords of the source operandand stores the sum in the third doubleword of the destination operand. It adds single-precision floating128-Bit Media and Scientific Programming167AMD64 Technology24592—Rev.
3.13—July 2007point values in the third and fourth doublewords of the source operand and stores the sum in the fourthdoubleword of the destination operand.The HADDPD instruction adds the two double-precision floating point values in the quadword halvesof the destination operand and stores the sum in the first quadword of the destination. It adds the valuesin the two quadword halves of the source register and stores the sum in the second quadword of thedestination register.Subtraction• SUBPS—Subtract Packed Single-Precision Floating-Point• SUBPD—Subtract Packed Double-Precision Floating-Point• SUBSS—Subtract Scalar Single-Precision Floating-Point• SUBSD—Subtract Scalar Double-Precision Floating-PointThe SUBPS instruction subtracts each of four single-precision floating-point values in the secondoperand from the corresponding single-precision floating-point value in the first operand and writesthe result in the corresponding quadword of the destination.
The SUBPD instruction performs ananalogous operation for two double-precision floating-point values.For vectors of n number of elements, the operations are:operand1[i] = operand1[i] - operand2[i]where: i = 0 to n – 1The SUBSS instruction subtracts the single-precision floating-point value in the low-orderdoubleword of the second operand from the corresponding single-precision floating-point value in thelow-order doubleword of the first operand and writes the result in the low-order doubleword of thedestination. The three high-order doublewords of the destination are not modified.The SUBSD instruction subtracts the double-precision floating-point value in the low-order quadwordof the second operand from the corresponding double-precision floating-point value in the low-orderquadword of the first operand and writes the result in the low-order quadword of the destination.
Thehigh-order quadword of the destination is not modified.Horizontal Subtraction• HSUBPS—Horizontal Subtract Packed Single-Precision Floating-Point• HSUBPD—Horizontal Subtract Packed Double-Precision Floating-PointThe HSUBPS instruction subtracts the packed-singled precision operand in the second doubleword ofthe destination register from that in the first doubleword of the destination register and stores the resultin the first doubleword of the destination register. It subtracts the fourth doubleword of the destinationoperand from the third doubleword of the destination operand and stores the result in the seconddoubleword of the destination.
It subtracts the packed-singled precision operand in the seconddoubleword of the source register from that in the first doubleword of the source register and stores theresult in the third doubleword of the destination register. It subtracts the fourth doubleword of the168128-Bit Media and Scientific Programming24592—Rev. 3.13—July 2007AMD64 Technologysource operand from the third doubleword of the source operand and stores the result in the fourthdoubleword of the destination.The HSUBPD instruction subtracts the second quadword of the destination register from the firstquadword of the destination operand and stores the difference in the first quadword of the destinationregister. The difference from the subtraction of the first quadword of the source operand from thesecond quadword of the source operand is stored in the second quadword of the destination operand.Simultaneous Addition and Subtraction• ADDSUBPS—Add/Subtract Packed Single-Precision Floating-Point• ADDSUBPD—Add/Subtract Packed Double-Precision Floating-PointThe ADDSUBPS instruction adds the second and fourth doublewords of the source operand to thesecond and fourth doublewords, respectively, of the destination operand and stores the resulting sumsin the second and fourth doublewords of the destination operand; subtracts the first and thirddoublewords of the first operand from the first and third doublewords of the destination operand andstores the resulting differences in the first and third doublewords of the destination operand.The ADDSUBPD instruction subtracts the first quadword of the source operand from the firstquadword of the destination operand and stores the difference in the first quadword of the destinationoperand; adds the second quadword of the source operand to the second quadword of the destinationoperand and stores the sum in the second quadword of the destination operand.Multiplication• MULPS—Multiply Packed Single-Precision Floating-Point• MULPD—Multiply Packed Double-Precision Floating-Point• MULSS—Multiply Scalar Single-Precision Floating-Point• MULSD—Multiply Scalar Double-Precision Floating-PointThe MULPS instruction multiplies each of four single-precision floating-point values in the firstoperand by the corresponding single-precision floating-point value in the second operand and writesthe result in the corresponding doubleword of the destination.
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