Volume 1 Basic Architecture (794100), страница 80
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EFLAGS Cross-Reference (Contd.)InstructionTESTOFSFZFAFPFCF0MM—M0TFIFDFNTRFUD2VERR/VERRWMWAITWBINVDWRMSRXADDMMMMMM0MM—M0XCHGXLATXORVol. 1 A-5EFLAGS CROSS-REFERENCEA-6 Vol. 1APPENDIX BEFLAGS CONDITION CODESB.1CONDITION CODESTable B-1 lists condition codes that can be queried using CMOVcc, FCMOVcc, Jcc, andSETcc. Condition codes refer to the setting of one or more status flags (CF, OF, SF, ZF,and PF) in the EFLAGS register. In the table below:•The “Mnemonic” column provides the suffix (cc) added to the instruction tospecify a test condition.••“Condition Tested For” describes the targeted condition.•“Status Flags Setting” describes the flag setting.“Instruction Subcode” provides the opcode suffix added to the main opcode tospecify the test condition.Table B-1. EFLAGS Condition CodesCondition Tested ForInstructionSubcodeStatus Flags SettingOOverflow0000OF = 1NONo overflow0001OF = 0BNAEBelowNeither above nor equal0010CF = 1NBAENot belowAbove or equal0011CF = 0EZEqualZero0100ZF = 1NENZNot equalNot zero0101ZF = 0BENABelow or equalNot above0110(CF OR ZF) = 1NBEANeither below nor equalAbove0111(CF OR ZF) = 0SSign1000SF = 1NSNo sign1001SF = 0PPEParityParity even1010PF = 1Mnemonic (cc)Vol.
1 B-1EFLAGS CONDITION CODESTable B-1. EFLAGS Condition Codes (Contd.)InstructionSubcodeStatus Flags SettingNo parityParity odd1011PF = 0LNGELessNeither greater nor equal1100(SF xOR OF) = 1NLGENot lessGreater or equal1101(SF xOR OF) = 0LENGLess or equalNot greater1110((SF XOR OF) OR ZF) = 1NLEGNeither less nor equalGreater1111((SF XOR OF) OR ZF) = 0Mnemonic (cc)Condition Tested ForNPPOMany of the test conditions are described in two different ways. For example, LE (lessor equal) and NG (not greater) describe the same test condition. Alternatemnemonics are provided to make code more intelligible.The terms “above” and “below” are associated with the CF flag and refer to the relation between two unsigned integer values.
The terms “greater” and “less” are associated with the SF and OF flags and refer to the relation between two signed integervalues.B-2 Vol. 1APPENDIX CFLOATING-POINT EXCEPTIONS SUMMARYC.1OVERVIEWThis appendix shows which of the floating-point exceptions can be generated for:••••x87 FPU instructions — see Table C-2SSE instructions — see Table C-3SSE2 instructions — see Table C-4SSE3 instructions — see Table C-5Table C-1 lists types of floating-point exceptions that potentially can be generated bythe x87 FPU and by SSE/SSE2/SSE3 instructions.Table C-1. x87 FPU and SIMD Floating-Point ExceptionsFloatingpointExceptionDescription#ISInvalid-operation exception for stack underflow or stack overflow (can only begenerated for x87 FPU instructions)*#IA or #IInvalid-operation exception for invalid arithmetic operands and unsupportedformats*#DDenormal-operand exception#ZDivide-by-zero exception#ONumeric-overflow exception#UNumeric-underflow exception#PInexact-result (precision) exceptionNOTE:* The x87 FPU instruction set generates two types of invalid-operation exceptions: #IS (stackunderflow or stack overflow) and #IA (invalid arithmetic operation due to invalid arithmeticoperands or unsupported formats).
SSE/SSE2/SSE3 instructions potentially generate #I (invalidoperation exceptions due to invalid arithmetic operands or unsupported formats).The floating point exceptions shown in Table C-1 (except for #D and #IS) are definedin IEEE Standard 754-1985 for Binary Floating-Point Arithmetic. See Section 4.9.1,“Floating-Point Exception Conditions,” for a detailed discussion of floating-pointexceptions.Vol.
1 C-1FLOATING-POINT EXCEPTIONS SUMMARYC.2X87 FPU INSTRUCTIONSTable C-2 lists the x87 FPU instructions in alphabetical order. For each instruction, itsummarizes the floating-point exceptions that the instruction can generate.Table C-2. Exceptions Generated with x87 FPU Floating-Point InstructionsMnemonicInstruction#IS #IA#DF2XM1ExponentialYYYFABSAbsolute valueYFADD(P)Add floating-pointYYYFBLDBCD loadYFBSTPBCD store and popYFCHSChange signYFCLEXClear exceptionsFCMOVccFloating-point conditionalmoveYFCOM, FCOMP, FCOMPPCompare floating-pointYYYFCOMI, FCOMIP, FUCOMI,FUCOMIPCompare floating-point andset EFLAGSYYYFCOSCosineYYYFDECSTPDecrement stack pointerFDIV(R)(P)Divide floating-pointYYYFFREEFree registerFIADDInteger addYYYFICOM(P)Integer compareYYY#Z#OY#U#PYYYYYYYYYYYYYYYYYYYYYYFIDIVInteger divideYYYYFIDIVRInteger divide reversedYYYYFILDInteger loadYFIMULInteger multiplyYYYFINCSTPIncrement stack pointerFINITInitialize processorFIST(P)Integer storeYYYFISTTPTruncate to integer(SSE3 instruction)YYYFISUB(R)Integer subtractYYC-2 Vol.
1YYYYFLOATING-POINT EXCEPTIONS SUMMARYTable C-2. Exceptions Generated with x87 FPU Floating-Point Instructions (Contd.)MnemonicFLD extended or stackInstructionLoad floating-point#IS #IA#D#Z#O#U#PYFLD single or doubleLoad floating-pointYFLD1Load + 1.0YYYFLDCWLoad Control wordYYYYYYYFLDENVLoad environmentYYYYYYYFLDL2ELoad log2eYFLDL2TLoad log210YFLDLG2Load log102YFLDLN2Load loge2YFLDPILoad πYFLDZLoad + 0.0YFMUL(P)Multiply floating-pointYYYYYYFNOPNo operationFPATANPartial arctangentYYYYYFPREMPartial remainderYYYYFPREM1IEEE partial remainderYYYYFPTANPartial tangentYYYYYYYYYFRNDINTRound to integerYYYFRSTORRestore stateYYYFSAVESave stateYYFSCALEScaleYYYYYFSINSineYYYYYFSINCOSSine and cosineYYYYYFSQRTSquare rootYYYFST(P) stack or extendedStore floating-pointYFST(P) single or doubleStore floating-pointYYFSTCWStore control wordFSTENVStore environmentFSTSW (AX)Store status wordFSUB(R)(P)Subtract floating-pointYYYFTSTTestYYYYYYYYYYVol.
1 C-3FLOATING-POINT EXCEPTIONS SUMMARYTable C-2. Exceptions Generated with x87 FPU Floating-Point Instructions (Contd.)MnemonicInstruction#IS #IAFUCOM(P)(P)Unordered compare floatingpointFWAITCPU WaitFXAMExamineFXCHExchange registersYFXTRACTExtractFYL2XFYL2XP1C.3Y#D#ZYYYYYYLogarithmYYYYLogarithm epsilonYYY#O#U#PYYYYYYSSE INSTRUCTIONSTable C-3 lists SSE instructions with at least one of the following characteristics:•••have floating-point operandsgenerate floating-point resultsread or write floating-point status and control informationThe table also summarizes the floating-point exceptions that each instruction cangenerate.Table C-3.
Exceptions Generated with SSE InstructionsMnemonicInstruction#I#D#Z#O#U#PADDPSPacked add.YYYYYADDSSScalar add.YYYYYANDNPSPacked logical INVERT andAND.ANDPSPacked logical AND.CMPPSPacked compare.YYCMPSSScalar compare.YYCOMISSScalar ordered compare lowerSP FP numbers and set thestatus flags.YYCVTPI2PSConvert two 32-bit signedintegers from MM2/Mem totwo SP FP.C-4 Vol. 1YFLOATING-POINT EXCEPTIONS SUMMARYTable C-3. Exceptions Generated with SSE Instructions (Contd.)MnemonicInstruction#I#D#Z#O#U#PCVTPS2PIConvert lower two SP FP fromXMM/Mem to two 32-bitsigned integers in MM usingrounding specified by MXCSR.YCVTSI2SSConvert one 32-bit signedinteger from Integer Reg/Memto one SP FP.CVTSS2SIConvert one SP FP fromXMM/Mem to one 32-bitsigned integer using roundingmode specified by MXCSR, andmove the result to an integerregister.YYCVTTPS2PIConvert two SP FP fromXMM2/Mem to two 32-bitsigned integers in MM1 usingtruncate.YYCVTTSS2SIConvert lowest SP FP fromXMM/Mem to one 32-bitsigned integer using truncate,and move the result to aninteger register.YYDIVPSPacked divide.YYYYYYDIVSSScalar divide.YYYYYYLDMXCSRLoad control/status word.MAXPSPacked maximum.YYMAXSSScalar maximum.YYMINPSPacked minimum.YYMINSSScalar minimum.YYMOVAPSMove four packed SP values.MOVHLPSMove packed SP high to low.MOVHPSMove two packed SP valuesbetween memory and the highhalf of an XMM register.MOVLHPSMove packed SP low to high.YYVol.
1 C-5FLOATING-POINT EXCEPTIONS SUMMARYTable C-3. Exceptions Generated with SSE Instructions (Contd.)MnemonicInstruction#I#D#Z#O#U#PMOVLPSMove two packed SP valuesbetween memory and the lowhalf of an XMM register.MOVMSKPSMove sign mask to r32.MOVSSMove scalar SP numberbetween an XMM register andmemory or a second XMMregister.MOVUPSMove unaligned packed data.MULPSPacked multiply.YYYYYMULSSScalar multiply.YYYYYORPSPacked OR.RCPPSPacked reciprocal.RCPSSScalar reciprocal.RSQRTPSPacked reciprocal square root.RSQRTSSScalar reciprocal square root.SHUFPSShuffle.SQRTPSSquare Root of the packed SPFP numbers.YYYSQRTSSScalar square roo.YYYSTMXCSRStore control/status word.SUBPSPacked subtract.YYYYYSUBSSScalar subtract.YYYYYUCOMISSUnordered compare lower SPFP numbers and set the statusflags.YYUNPCKHPSInterleave SP FP numbers.UNPCKLPSInterleave SP FP numbers.XORPSPacked XOR.C-6 Vol.
1FLOATING-POINT EXCEPTIONS SUMMARYC.4SSE2 INSTRUCTIONSTable C-4 lists SSE2 instructions with at least one of the following characteristics:••floating-point operandsfloating point resultsFor each instruction, the table summarizes the floating-point exceptions that theinstruction can generate.Table C-4. Exceptions Generated with SSE2 InstructionsInstructionDescription#I#DADDPDAdd two packed DP FPnumbers from XMM2/Mem toXMM1.YADDSDAdd the lower DP FP numberfrom XMM2/Mem to XMM1.ANDNPDInvert the 128 bits inXMM1and then AND the resultwith 128 bits fromXMM2/Mem.ANDPDLogical And of 128 bits fromXMM2/Mem to XMM1 register.CMPPD#Z#O#U#PYYYYYYYYYCompare packed DP FPnumbers from XMM2/Mem topacked DP FP numbers inXMM1 register using imm8 aspredicate.YYCMPSDCompare lowest DP FP numberfrom XMM2/Mem to lowest DPFP number in XMM1 registerusing imm8 as predicate.YYCOMISDCompare lower DP FP numberin XMM1 register with lowerDP FP number in XMM2/Memand set the status flagsaccordinglyYYCVTDQ2PSConvert four 32-bit signedintegers from XMM/Mem tofour SP FP.CVTPS2DQConvert four SP FP fromXMM/Mem to four 32-bitsigned integers in XMM usingrounding specified by MXCSR.YYYVol.
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