Volume 1 Basic Architecture (794100), страница 67
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Scalar Double-Precision Floating-Point Operations11.4.1.1Data Movement InstructionsData movement instructions move double-precision floating-point data betweenXMM registers and between XMM registers and memory.The MOVAPD (move aligned packed double-precision floating-point) instructiontransfers a 128-bit packed double-precision floating-point operand from memory toan XMM register or vice versa, or between XMM registers. The memory address mustbe aligned to a 16-byte boundary; if not, a general-protection exception (GP#) isgenerated.The MOVUPD (move unaligned packed double-precision floating-point) instructiontransfers a 128-bit packed double-precision floating-point operand from memory toan XMM register or vice versa, or between XMM registers.
Alignment of the memoryaddress is not required.The MOVSD (move scalar double-precision floating-point) instruction transfers a64-bit double-precision floating-point operand from memory to the low quadword ofVol. 1 11-7PROGRAMMING WITH STREAMING SIMD EXTENSIONS 2 (SSE2)an XMM register or vice versa, or between XMM registers. Alignment of the memoryaddress is not required, unless alignment checking is enabled.The MOVHPD (move high packed double-precision floating-point) instruction transfers a 64-bit double-precision floating-point operand from memory to the high quadword of an XMM register or vice versa. The low quadword of the register is leftunchanged. Alignment of the memory address is not required, unless alignmentchecking is enabled.The MOVLPD (move low packed double-precision floating-point) instruction transfersa 64-bit double-precision floating-point operand from memory to the low quadwordof an XMM register or vice versa.
The high quadword of the register is left unchanged.Alignment of the memory address is not required, unless alignment checking isenabled.The MOVMSKPD (move packed double-precision floating-point mask) instructionextracts the sign bit of each of the two packed double-precision floating-pointnumbers in an XMM register and saves them in a general-purpose register. This 2-bitvalue can then be used as a condition to perform branching.11.4.1.2SSE2 Arithmetic InstructionsSSE2 arithmetic instructions perform addition, subtraction, multiply, divide, squareroot, and maximum/minimum operations on packed and scalar double-precisionfloating-point values.The ADDPD (add packed double-precision floating-point values) and SUBPD(subtract packed double-precision floating-point values) instructions add andsubtract, respectively, two packed double-precision floating-point operands.The ADDSD (add scalar double-precision floating-point values) and SUBSD (subtractscalar double-precision floating-point values) instructions add and subtract, respectively, the low double-precision floating-point values of two operands and stores theresult in the low quadword of the destination operand.The MULPD (multiply packed double-precision floating-point values) instructionmultiplies two packed double-precision floating-point operands.The MULSD (multiply scalar double-precision floating-point values) instruction multiplies the low double-precision floating-point values of two operands and stores theresult in the low quadword of the destination operand.The DIVPD (divide packed double-precision floating-point values) instruction dividestwo packed double-precision floating-point operands.The DIVSD (divide scalar double-precision floating-point values) instruction dividesthe low double-precision floating-point values of two operands and stores the resultin the low quadword of the destination operand.The SQRTPD (compute square roots of packed double-precision floating-pointvalues) instruction computes the square roots of the values in a packed double-precision floating-point operand.11-8 Vol.
1PROGRAMMING WITH STREAMING SIMD EXTENSIONS 2 (SSE2)The SQRTSD (compute square root of scalar double-precision floating-point values)instruction computes the square root of the low double-precision floating-point valuein the source operand and stores the result in the low quadword of the destinationoperand.The MAXPD (return maximum of packed double-precision floating-point values)instruction compares the corresponding values in two packed double-precisionfloating-point operands and returns the numerically greater value from each comparison to the destination operand.The MAXSD (return maximum of scalar double-precision floating-point values)instruction compares the low double-precision floating-point values from two packeddouble-precision floating-point operands and returns the numerically higher valuefrom the comparison to the low quadword of the destination operand.The MINPD (return minimum of packed double-precision floating-point values)instruction compares the corresponding values from two packed double-precisionfloating-point operands and returns the numerically lesser value from each comparison to the destination operand.The MINSD (return minimum of scalar double-precision floating-point values)instruction compares the low values from two packed double-precision floating-pointoperands and returns the numerically lesser value from the comparison to the lowquadword of the destination operand.11.4.1.3SSE2 Logical InstructionsSSE2 logical instructions perform AND, AND NOT, OR, and XOR operations on packeddouble-precision floating-point values.The ANDPD (bitwise logical AND of packed double-precision floating-point values)instruction returns the logical AND of two packed double-precision floating-pointoperands.The ANDNPD (bitwise logical AND NOT of packed double-precision floating-pointvalues) instruction returns the logical AND NOT of two packed double-precisionfloating-point operands.The ORPD (bitwise logical OR of packed double-precision floating-point values)instruction returns the logical OR of two packed double-precision floating-point operands.The XORPD (bitwise logical XOR of packed double-precision floating-point values)instruction returns the logical XOR of two packed double-precision floating-pointoperands.11.4.1.4SSE2 Comparison InstructionsSSE2 compare instructions compare packed and scalar double-precision floatingpoint values and return the results of the comparison either to the destinationoperand or to the EFLAGS register.Vol.
1 11-9PROGRAMMING WITH STREAMING SIMD EXTENSIONS 2 (SSE2)The CMPPD (compare packed double-precision floating-point values) instructioncompares the corresponding values from two packed double-precision floating-pointoperands, using an immediate operand as a predicate, and returns a 64-bit maskresult of all 1s or all 0s for each comparison to the destination operand. The value ofthe immediate operand allows the selection of any of eight compare conditions:equal, less than, less than equal, unordered, not equal, not less than, not less thanor equal, or ordered.The CMPSD (compare scalar double-precision floating-point values) instructioncompares the low values from two packed double-precision floating-point operands,using an immediate operand as a predicate, and returns a 64-bit mask result of all 1sor all 0s for the comparison to the low quadword of the destination operand.
Theimmediate operand selects the compare condition as with the CMPPD instruction.The COMISD (compare scalar double-precision floating-point values and set EFLAGS)and UCOMISD (unordered compare scalar double-precision floating-point values andset EFLAGS) instructions compare the low values of two packed double-precisionfloating-point operands and set the ZF, PF, and CF flags in the EFLAGS register toshow the result (greater than, less than, equal, or unordered). These two instructions differ as follows: the COMISD instruction signals a floating-point invalid-operation (#I) exception when a source operand is either a QNaN or an SNaN; theUCOMISD instruction only signals an invalid-operation exception when a sourceoperand is an SNaN.11.4.1.5SSE2 Shuffle and Unpack InstructionsSSE2 shuffle instructions shuffle the contents of two packed double-precisionfloating-point values and store the results in the destination operand.The SHUFPD (shuffle packed double-precision floating-point values) instructionplaces either of the two packed double-precision floating-point values from the destination operand in the low quadword of the destination operand, and places either ofthe two packed double-precision floating-point values from source operand in thehigh quadword of the destination operand (see Figure 11-5).
By using the sameregister for the source and destination operands, the SHUFPD instruction can swaptwo packed double-precision floating-point values.11-10 Vol. 1PROGRAMMING WITH STREAMING SIMD EXTENSIONS 2 (SSE2)DESTX1SRCY1DESTY1 or Y0X0Y0X1 or X0Figure 11-5. SHUFPD Instruction, Packed Shuffle OperationThe UNPCKHPD (unpack and interleave high packed double-precision floating-pointvalues) instruction performs an interleaved unpack of the high values from thesource and destination operands and stores the result in the destination operand(see Figure 11-6).The UNPCKLPD (unpack and interleave low packed double-precision floating-pointvalues) instruction performs an interleaved unpack of the low values from the sourceand destination operands and stores the result in the destination operand (seeFigure 11-7).DESTX1X0SRCY1Y0DESTY1X1Figure 11-6.
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