Volume 1 Basic Architecture (794100), страница 14
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The literature available is listed by Intel processor and then by the followingliterature types: applications notes, data sheets, manuals, papers, and specificationupdates.See also:•••The data sheet for a particular Intel 64 or IA-32 processor•Intel® Fortran Compiler documentation and online helphttp://www.intel.com/cd/software/products/asmo-na/eng/index.htm•Intel® VTune™ Performance Analyzer documentation and online helphttp://www.intel.com/cd/software/products/asmo-na/eng/index.htm•Intel® 64 and IA-32 Architectures Software Developer’s Manual (in five volumes)http://developer.intel.com/products/processor/manuals/index.htm•Intel® 64 and IA-32 Architectures Optimization Reference Manualhttp://developer.intel.com/products/processor/manuals/index.htm•Intel® Processor Identification with the CPUID Instruction, AP-485http://www.intel.com/support/processors/sb/cs-009861.htm•Developing Multi-threaded Applications: A Platform Consistent Approach•Using Spin-Loops on Intel Pentium 4 Processor and Intel Xeon Processor MPhttp://www3.intel.com/cd/ids/developer/asmona/eng/dc/threading/knowledgebase/19083.htmThe specification update for a particular Intel 64 or IA-32 processorIntel® C++ Compiler documentation and online helphttp://www.intel.com/cd/software/products/asmo-na/eng/index.htmhttp://cachewww.intel.com/cd/00/00/05/15/51534_developing_multithreaded_applications.pdfMore relevant links are:•Software network link:http://softwarecommunity.intel.com/isn/home/Vol.
1 1-9ABOUT THIS MANUAL•Developer centers:http://www.intel.com/cd/ids/developer/asmo-na/eng/dc/index.htm•Processor support general link:http://www.intel.com/support/processors/•Software products and packages:http://www.intel.com/cd/software/products/asmo-na/eng/index.htm•Intel 64 and IA-32 processor manuals (printed or PDF downloads):http://developer.intel.com/products/processor/manuals/index.htm•Intel® Multi-Core Technology:http://developer.intel.com/multi-core/index.htm•Hyper-Threading Technology (HT Technology):http://developer.intel.com/technology/hyperthread/1-10 Vol. 1CHAPTER 2INTEL 64 AND IA-32 ARCHITECTURES®The exponential growth of computing power and ownership has made the computerone of the most important forces shaping business and society. Intel 64 and IA-32architectures have been at the forefront of the computer revolution and is today thepreferred computer architecture, as measured by computers in use and the totalcomputing power available in the world.2.1BRIEF HISTORY OF INTEL® 64 AND IA-32ARCHITECTUREThe following sections provide a summary of the major technical evolutions fromIA-32 to Intel 64 architecture: starting from the Intel 8086 processor to the latestIntel Core 2 Duo and Intel Xeon processor 5100 series.
Object code created forprocessors released as early as 1978 still executes on the latest processors in theIntel 64 and IA-32 architecture families.2.1.116-bit Processors and Segmentation (1978)The IA-32 architecture family was preceded by 16-bit processors, the 8086 and8088. The 8086 has 16-bit registers and a 16-bit external data bus, with 20-bitaddressing giving a 1-MByte address space. The 8088 is similar to the 8086 except ithas an 8-bit external data bus.The 8086/8088 introduced segmentation to the IA-32 architecture. With segmentation, a 16-bit segment register contains a pointer to a memory segment of up to64 KBytes. Using four segment registers at a time, 8086/8088 processors are able toaddress up to 256 KBytes without switching between segments.
The 20-bitaddresses that can be formed using a segment register and an additional 16-bitpointer provide a total address range of 1 MByte.2.1.2The Intel® 286 Processor (1982)The Intel 286 processor introduced protected mode operation into the IA-32 architecture.
Protected mode uses the segment register content as selectors or pointersinto descriptor tables. Descriptors provide 24-bit base addresses with a physicalmemory size of up to 16 MBytes, support for virtual memory management on asegment swapping basis, and a number of protection mechanisms. These mechanisms include:•Segment limit checkingVol. 1 2-1INTEL® 64 AND IA-32 ARCHITECTURES••Read-only and execute-only segment optionsFour privilege levels2.1.3The Intel386™ Processor (1985)The Intel386 processor was the first 32-bit processor in the IA-32 architecture family.It introduced 32-bit registers for use both to hold operands and for addressing.
Thelower half of each 32-bit Intel386 register retains the properties of the 16-bit registers of earlier generations, permitting backward compatibility. The processor alsoprovides a virtual-8086 mode that allows for even greater efficiency when executingprograms created for 8086/8088 processors.In addition, the Intel386 processor has support for:•••A 32-bit address bus that supports up to 4-GBytes of physical memory•Support for parallel stagesA segmented-memory model and a flat memory modelPaging, with a fixed 4-KByte page size providing a method for virtual memorymanagement2.1.4The Intel486™ Processor (1989)The Intel486™ processor added more parallel execution capability by expanding theIntel386 processor’s instruction decode and execution units into five pipelinedstages.
Each stage operates in parallel with the others on up to five instructions indifferent stages of execution.In addition, the processor added:•An 8-KByte on-chip first-level cache that increased the percent of instructionsthat could execute at the scalar rate of one per clock••An integrated x87 FPUPower saving and system management capabilities2.1.5The Intel® Pentium® Processor (1993)The introduction of the Intel Pentium processor added a second execution pipeline toachieve superscalar performance (two pipelines, known as u and v, together canexecute two instructions per clock). The on-chip first-level cache doubled, with 8KBytes devoted to code and another 8 KBytes devoted to data.
The data cache usesthe MESI protocol to support more efficient write-back cache in addition to the writethrough cache previously used by the Intel486 processor. Branch prediction with anon-chip branch table was added to increase performance in looping constructs.In addition, the processor added:2-2 Vol.
1INTEL® 64 AND IA-32 ARCHITECTURES•Extensions to make the virtual-8086 mode more efficient and allow for 4-MByteas well as 4-KByte pages••••Internal data paths of 128 and 256 bits add speed to internal data transfersBurstable external data bus was increased to 64 bitsAn APIC to support systems with multiple processorsA dual processor mode to support glueless two processor systemsA subsequent stepping of the Pentium family introduced Intel MMX technology (thePentium Processor with MMX technology). Intel MMX technology uses the singleinstruction, multiple-data (SIMD) execution model to perform parallel computationson packed integer data contained in 64-bit registers.See Section 2.2.4, “SIMD Instructions.”2.1.6The P6 Family of Processors (1995-1999)The P6 family of processors was based on a superscalar microarchitecture that setnew performance standards; see also Section 2.2.1, “P6 Family Microarchitecture.”One of the goals in the design of the P6 family microarchitecture was to exceed theperformance of the Pentium processor significantly while using the same 0.6micrometer, four-layer, metal BICMOS manufacturing process.
Members of thisfamily include the following:•The Intel Pentium Pro processor is three-way superscalar. Using parallelprocessing techniques, the processor is able on average to decode, dispatch, andcomplete execution of (retire) three instructions per clock cycle. The Pentium Prointroduced the dynamic execution (micro-data flow analysis, out-of-orderexecution, superior branch prediction, and speculative execution) in asuperscalar implementation. The processor was further enhanced by its caches.It has the same two on-chip 8-KByte 1st-Level caches as the Pentium processorand an additional 256-KByte Level 2 cache in the same package as the processor.•The Intel Pentium II processor added Intel MMX technology to the P6 familyprocessors along with new packaging and several hardware enhancements.
Theprocessor core is packaged in the single edge contact cartridge (SECC). The Levell data and instruction caches were enlarged to 16 KBytes each, and Level 2 cachesizes of 256 KBytes, 512 KBytes, and 1 MByte are supported. A half-clock speedbackside bus connects the Level 2 cache to the processor. Multiple low-powerstates such as AutoHALT, Stop-Grant, Sleep, and Deep Sleep are supported toconserve power when idling.•The Pentium II Xeon processor combined the premium characteristics ofprevious generations of Intel processors. This includes: 4-way, 8-way (and up)scalability and a 2 MByte 2nd-Level cache running on a full-clock speed backsidebus.•The Intel Celeron processor family focused on the value PC market segment.Its introduction offers an integrated 128 KBytes of Level 2 cache and a plastic pingrid array (P.P.G.A.) form factor to lower system design cost.Vol.
1 2-3INTEL® 64 AND IA-32 ARCHITECTURES•The Intel Pentium III processor introduced the Streaming SIMD Extensions(SSE) to the IA-32 architecture. SSE extensions expand the SIMD executionmodel introduced with the Intel MMX technology by providing a new set of 128bit registers and the ability to perform SIMD operations on packed singleprecision floating-point values. See Section 2.2.4, “SIMD Instructions.”•The Pentium III Xeon processor extended the performance levels of the IA-32processors with the enhancement of a full-speed, on-die, and Advanced TransferCache.2.1.7The Intel® Pentium® 4 Processor Family (2000-2006)The Intel Pentium 4 processor family is based on Intel NetBurst microarchitecture;see Section 2.2.2, “Intel NetBurst® Microarchitecture.”The Intel Pentium 4 processor introduced Streaming SIMD Extensions 2 (SSE2); seeSection 2.2.4, “SIMD Instructions.” The Intel Pentium 4 processor 3.40 GHz,supporting Hyper-Threading Technology introduced Streaming SIMD Extensions 3(SSE3); see Section 2.2.4, “SIMD Instructions.”Intel 64 architecture was introduced in the Intel Pentium 4 Processor Extreme Editionsupporting Hyper-Threading Technology and in the Intel Pentium 4 Processor 6xx and5xx sequences.Intel® Virtualization Technology (Intel® VT) was introduced in the Intel Pentium 4processor 672 and 662.2.1.8The Intel® Xeon® Processor (2001-2006)Intel Xeon processors (with exception for dual-core Intel Xeon processor LV, IntelXeon processor 5100 series) are based on the Intel NetBurst microarchitecture; seeSection 2.2.2, “Intel NetBurst® Microarchitecture.” As a family, this group of IA-32processors (more recently Intel 64 processors) is designed for use in multi-processorserver systems and high-performance workstations.The Intel Xeon processor MP introduced support for Hyper-Threading Technology;see Section 2.2.5, “Hyper-Threading Technology.”The 64-bit Intel Xeon processor 3.60 GHz (with an 800 MHz System Bus) was used tointroduce Intel 64 architecture.
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