Volume 1 Application Programming (794095), страница 65
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Normalized floating-point numbers are the most frequent operands for x87instructions. These are finite, non-zero, positive or negative numbers in which the integer bit is 1, thebiased exponent is non-zero and non-maximum, and the fraction is any representable value. Thus, thesignificand is within the range of [1, 2). Whenever possible, the processor represents a floating-pointresult as a normalized number.Denormalized (Tiny) Numbers. Denormalized numbers (also called tiny numbers) are smaller thanthe smallest representable normalized numbers. They arise through an underflow condition, when theexponent of a result lies below the representable minimum exponent.
These are finite, non-zero,positive or negative numbers in which the integer bit is 0, the biased exponent is 0, and the fraction isnon-zero.The processor generates a denormalized-operand exception (DE) when an instruction uses adenormalized source operand. The processor may generate an underflow exception (UE) when aninstruction produces a rounded, non-zero result that is too small to be represented as a normalizedfloating-point number in the destination format, and thus is represented as a denormalized number.
If aresult, after rounding, is too small to be represented as the minimum denormalized number, it isrepresented as zero. (See “Exceptions” on page 279 for specific details.)Denormalization may correct the exponent by placing leading zeros in the significand. This may causea loss of precision, because the number of significant bits in the fraction is reduced by the leadingzeros. In the single-precision floating-point format, for example, normalized numbers have biasedexponents ranging from 1 to 254 (the unbiased exponent range is from –126 to +127). A true resultx87 Floating-Point Programming255AMD64 Technology24592—Rev.
3.13—July 2007with an exponent of, say, –130, undergoes denormalization by right-shifting the significand by thedifference between the normalized exponent and the minimum exponent, as shown in Table 6-6.Table 6-6.Example of DenormalizationSignificand (base 2)ExponentResult Type1.0011010000000000–130True result0.0001001101000000–126Denormalized resultPseudo-Denormalized Numbers. Pseudo-denormalized numbers are positive or negative numbersin which the integer bit is 1, the biased exponent is 0, and the fraction is any value. The processoraccepts pseudo-denormal source operands but it does not produce pseudo-denormal results. When apseudo-denormal number is used as a source operand, the processor treats the arithmetic value of itsbiased exponent as 1 rather then 0, and the processor generates a denormalized-operand exception(DE).Zero.
The floating-point zero is a finite, positive or negative number in which the integer bit is 0, thebiased exponent is 0, and the fraction is 0. The sign of a zero result depends on the operation beingperformed and the selected rounding mode. It may indicate the direction from which an underflowoccurred, or it may reflect the result of a division by +∞ or –∞.Infinity. Infinity is a positive or negative number, +∞ and –∞, in which the integer bit is 1, the biasedexponent is maximum, and the fraction is 0. The infinities are the maximum numbers that can berepresented in floating-point format. Negative infinity is less than any finite number and positiveinfinity is greater than any finite number (i.e., the affine sense).An infinite result is produced when a non-zero, non-infinite number is divided by 0 or multiplied byinfinity, or when infinity is added to infinity or to 0.
Arithmetic on infinities is exact. For example,adding any floating-point number to +∞ gives a result of +∞. Arithmetic comparisons work correctlyon infinities. Exceptions occur only when the use of an infinity as a source operand constitutes aninvalid operation.Not a Number (NaN).
NaNs are non-numbers, lying outside the range of representable floating-pointvalues. The integer bit is 1, the biased exponent is maximum, and the fraction is non-zero. NaNs are oftwo types:••Signaling NaN (SNaN)Quiet NaN (QNaN)A QNaN is a NaN with the most-significant fraction bit set to 1, and an SNaN is a NaN with the mostsignificant fraction bit cleared to 0. When the processor encounters an SNaN as a source operand foran instruction, an invalid-operation exception (IE) occurs and a QNaN is produced as the result, if theexception is masked. In general, when the processor encounters a QNaN as a source operand for aninstruction—in an instruction other than FxCOMx, FISTx, or FSTx—the processor does not generatean exception but generates a QNaN as the result.256x87 Floating-Point Programming24592—Rev. 3.13—July 2007AMD64 TechnologyThe processor never generates an SNaN as a result of a floating-point operation.
When an invalidoperation exception (IE) occurs due to an SNaN operand, the invalid-operation exception mask (IM)bit determines the processor’s response, as described in “x87 Floating-Point Exception Masking” onpage 284.When a floating-point operation or exception produces a QNaN result, its value is derived from thesource operands according to the rules shown in Table 6-7.6.3.4 Number EncodingsSupported Encodings. Table 6-8 on page 258 shows the floating-point encodings of supportednumbers and non-numbers.
The number categories are ordered from large to small. In this affineordering, positive infinity is larger than any positive normalized number, which in turn is larger thanany positive denormalized number, which is larger than positive zero, and so forth. Thus, the ordinaryrules of comparison apply between categories as well as within categories, so that comparison of anytwo numbers is well-defined.The actual exponent field length is 8, 11, or 15 bits, and the fraction field length is 23, 52, or 63 bits,depending on operand precision.Table 6-7.NaN Results from NaN Source OperandsSource Operand(in either order)1NaN Result2QNaNAny non-NaN floating-point value(or single-operand instruction)Value of QNaNSNaNAny non-NaN floating-point value(or single-operand instruction)Value of SNaN,converted to a QNaN3QNaNQNaNValue of QNaN withthe larger significand4QNaNSNaNValue of QNaNSNaNQNaNValue of QNaNSNaNSNaNValue of SNaN withthe larger significand4Note:1.
This table does not include NaN source operands used in FxCOMx, FISTx, or FSTxinstructions.2. A NaN result is produced when the floating-point invalid-operation exception ismasked.3. The conversion is done by changing the most-significant fraction bit to 1.4. If the significands of the source operands are equal but their signs are different, theNaN result is undefined.The single-precision and double-precision formats do not include the integer bit in the significand (thevalue of the integer bit can be inferred from number encodings). The double-extended-precisionformat explicitly includes the integer in bit 63 and places the most-significant fraction bit in bit 62.x87 Floating-Point Programming257AMD64 Technology24592—Rev. 3.13—July 2007Exponents of all three types are encoded in biased format, with respective biasing constants of 127,1023, and 16,383.Table 6-8.Supported Floating-Point EncodingsClassificationSignBiasedExponent1Significand2SNaN01.011 ...
111111 ... 111 to1.000 ... 001QNaN01.111 ... 111111 ... 111 to1.100 ... 000Positive Infinity (+∞)0111 ... 111 1.000 ... 000Positive Normal0111 ... 110 1.111 ... 111toto000 ... 001 1.000 ... 00001.111 ... 111000 ... 000 to1.000 ... 001Positive Denormal00.111 ...
111000 ... 000 to0.000 ... 001Positive Zero0000 ... 000 0.000 ... 000PositiveNon-NumbersPositivePositive PseudoFloating-PointDenormal3NumbersNote:1. The actual exponent field length is 8, 11, or 15 bits, depending on operand precision.2. The “1.” and “0.” prefixes represent the implicit or explicit integer bit. The actual fraction field length is 23, 52, or 63 bits, depending on operand precision.3.
Pseudo-denormals can only occur in double-extended-precision format, becausethey require an explicit integer bit.4. The floating-point indefinite value is a QNaN with a negative sign and a significandwhose value is 1.100 ... 000.258x87 Floating-Point Programming24592—Rev. 3.13—July 2007Table 6-8.AMD64 TechnologySupported Floating-Point Encodings (continued)ClassificationSignBiasedExponent1Significand2Negative Zero1000 ... 000 0.000 ... 000Negative Denormal10.000 ... 001000 ... 000 to0.111 ... 11111.000 ... 001000 ... 000 to1.111 ...
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