Volume 1 Application Programming (794095), страница 36
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3.13—July 2007AMD64 TechnologySoftware can interpret the data types in ways other than those shown in Figure 4-14 on page 122—such as bit fields or fractional numbers—but the 128-bit media instructions do not directly supportsuch interpretations and software must handle them entirely on its own.4.4.2 Operand Sizes and OverridesOperand sizes for 128-bit media instructions are determined by instruction opcodes.
Some of theseopcodes include an operand-size override prefix, but this prefix acts in a special way to modify theopcode and is considered an integral part of the opcode. The general use of the 66h operand-sizeoverride prefix described in “Instruction Prefixes” on page 71 does not apply to 128-bit mediainstructions.For details on the use of operand-size override prefixes in 128-bit media instructions, see the opcodesin “128-Bit Media Instruction Reference” in Volume 4.4.4.3 Operand AddressingDepending on the 128-bit media instruction, referenced operands may be in registers or memory.Register Operands.
Most 128-bit media instructions can access source and destination operands inXMM registers. A few of these instructions access the MMX registers, GPR registers, rFLAGSregister, or MXCSR register. The type of register addressed is specified in the instruction syntax.When addressing GPR or XMM registers, the REX instruction prefix can be used to access theextended GPR or XMM registers, as described in “Instruction Prefixes” on page 175.Memory Operands. Most 128-bit media instructions can read memory for source operands, andsome of the instructions can write results to memory. “Memory Addressing” on page 14, describes thegeneral methods for addressing memory operands.Immediate Operands. Immediate operands are used in certain data-conversion, vector-shift, andvector-compare instructions.
Such instructions take 8-bit immediates, which provide control for theoperation.I/O Ports. I/O ports in the I/O address space cannot be directly addressed by 128-bit mediainstructions, and although memory-mapped I/O ports can be addressed by such instructions, doing somay produce unpredictable results, depending on the hardware implementation of the architecture.4.4.4 Data AlignmentGenerally, 128-bit media instructions that access a 128-bit operand in memory trigger a generalprotection exception (#GP) if the operand is not aligned to a 16-byte boundary.
For instance, 128-bitmedia instructions that manipulate scalar operands never trigger a #GP, nor do the followinginstructions:•••MASKMOVDQU—Masked Move Double Quadword Unaligned.MOVDQU—Move Unaligned Double Quadword.MOVUPD—Move Unaligned Packed Double-Precision Floating-Point.128-Bit Media and Scientific Programming123AMD64 Technology••24592—Rev. 3.13—July 2007MOVUPS—Move Unaligned Packed Single-Precision Floating-Point.LDDQU—Load Unaligned Double QuadwordWhen alignment checking is enabled (CR0.AM = 1 and rFLAGS.AC = 1) and the MXCSR misalignedexception mask (MM) bit is set to 1, a 16-byte misaligned memory access on most packed SSEinstructions will not cause a #GP exception, but a #AC exception is generated instead.
On the otherhand, if MM is cleared to 0, then a 16-byte misaligned memory access will cause a #GP exception.Keep in mind that the corresponding MXCSR_MASK bit (17) is 1, regardless of whether MM is set ornot. For details on MXCSR and MXCSR_MASK, see “128-Bit, 64-Bit, and x87 Programming” in theAMD64 Architecture Programmer’s Manual Volume 2: System Programming, order #24593.The FXSAVE, FXRSTOR, MOVAPD, MOVAPS, and MOVDQA, MOVNTDQ, MOVNTPD andMOVNTPS instructions do not support misaligned accesses. These instructions always generate a #GPexception if misaligned on a 16-byte boundary.While the architecture does not impose data-alignment requirements for 128-bit media instructions,the consequence of storing operands at unaligned locations is that accesses to those operands mayrequire more processor and bus cycles than for aligned accesses.
See “Data Alignment” on page 40 fordetails.Support for misaligned SSE mode is indicated by ECX bit 7 of CPUID function 8000_0001h.4.4.5 Integer Data TypesThe 128-bit media instructions that support operations on integer data types are summarized in“Instruction Summary—Integer Instructions” on page 133. The characteristics of these data types aredescribed below.Sign. Many of the 128-bit media instructions have variants for operating on signed or unsignedintegers. For signed integers, the sign bit is the most-significant bit—bit 7 for a byte, bit 15 for a word,bit 31 for a doubleword, bit 63 for a quadword, or bit 127 for a double quadword.
Arithmeticinstructions that are not specifically named as unsigned perform signed two’s-complement arithmetic.Range of Representable Values. Table 4-1 shows the range of representable values for the integerdata types.124128-Bit Media and Scientific Programming24592—Rev. 3.13—July 2007AMD64 TechnologyTable 4-1. Range of Values in 128-Bit Media Integer Data TypesData-TypeInterpretationBase-2Unsigned (exact)integersBase-10(approx.)Signedintegers1Base-2(exact)Base-10(approx.)ByteWordDoublewordQuadwordDoubleQuadword0 to +28–10 to +216–10 to +232–10 to +264–10 to +2128–10 to 2550 to 65,5350 to 4.29 * 1090 to 1.84 * 10190 to 3.40 * 1038–27 to +(27 –1)–215 to+(215–1)-128 to +127-32,768 to+32,767–231 to +(231 –1) –263 to +(263 –1) –2127 to +(2127–1)-2.14 * 109 to+2.14 * 109–9.22 * 1018to +9.22 * 1018–1.70 * 1038to +1.70 * 1038Note:1.
The sign bit is the most-significant bit (bit 7 for a byte, bit 15 for a word, bit 31 for doubleword, bit 63 for quadword,bit 127 for double quadword.).Saturation. Saturating (also called limiting or clamping) instructions limit the value of a result to themaximum or minimum value representable by the applicable data type. Saturating versions of integervector-arithmetic instructions operate on byte-sized and word-sized elements.
These instructions—forexample, PACKx, PADDSx, PADDUSx, PSUBSx, and PSUBUSx—saturate signed or unsigned dataat the vector-element level when the element reaches its maximum or minimum representable value.Saturation avoids overflow or underflow errors.The examples in Table 4-2 on page 125 illustrate saturating and non-saturating results with wordoperands. Saturation for other data-type sizes follows similar rules. Once saturated, the saturated valueis treated like any other value of its type.
For example, if 0001h is subtracted from the saturated value,7FFFh, the result is 7FFEh.Table 4-2.Saturation ExamplesOperationNon-SaturatedInfinitely PreciseResultSaturatedSigned ResultSaturatedUnsigned Result7000h + 2000h9000h7FFFh9000h7000h + 7000hE000h7FFFhE000hF000h + F000h1E000hE000hFFFFh9000h + 9000h12000h8000hFFFFh7FFFh + 0100h80FFh7FFFh80FFh7FFFh + FF00h17EFFh7EFFhFFFFhArithmetic instructions not specifically designated as saturating perform non-saturating, twoscomplement arithmetic.Other Fixed-Point Operands. The architecture provides specific support only for integer fixed-pointoperands—those in which an implied binary point is always located to the right of bit 0.
Nevertheless,128-Bit Media and Scientific Programming125AMD64 Technology24592—Rev. 3.13—July 2007software may use fixed-point operands in which the implied binary point is located in any position. Insuch cases, software is responsible for managing the interpretation of such implied binary points, aswell as any redundant sign bits that may occur during multiplication.4.4.6 Floating-Point Data TypesThe 128-bit media floating-point instructions take vector or scalar operands, depending on theinstruction.
The vector instructions operate in parallel on up to four, or four pairs, of single-precisionfloating-point values or up to two, or two pairs, of double-precision floating-point values. The scalarinstructions operate on only one, or one pair, of single-precision or double-precision operands.Floating-Point Data Types. The floating-point data types, shown in Figure 4-15 on page 126,include 32-bit single precision and 64-bit double precision. Both formats are fully compatible with theIEEE Standard for Binary Floating-Point Arithmetic (ANSI/IEEE Std 754). The 128-bit mediainstructions operate internally on floating-point data types in the precision specified by eachinstruction.31 30Single PrecisionS23 22BiasedExponent0Significand(also Fraction)S = Sign BitDouble Precision63 62S52 51BiasedExponent0Significand(also Fraction)S = Sign BitFigure 4-15.
128-Bit Media Floating-Point Data TypesBoth of the floating-point data types consist of a sign (0 = positive, 1 = negative), a biased exponent(base-2), and a significand, which represents the integer and fractional parts of the number. The integerbit (also called the J bit) is implied (called a hidden integer bit).
The value of an implied integer bit canbe inferred from number encodings, as described in “Floating-Point Number Encodings” on page 130.The bias of the exponent is a constant that makes the exponent always positive and allowsreciprocation, without overflow, of the smallest normalized number representable by that data type.Specifically, the data types are formatted as follows:126128-Bit Media and Scientific Programming24592—Rev. 3.13—July 2007••AMD64 TechnologySingle-Precision Format—This format includes a 1-bit sign, an 8-bit biased exponent whose valueis 127, and a 23-bit significand.
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