USP_6423650 (1063529)
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US006423650B2(12)(54)United States Patent(10) Patent N0.:Plat et al.(45) Date of Patent:4,350,755 A *9/1982 Wang ....................... .. 430/264BY INCREASING SURFACE ROUGHNESSOF THE SUBSTRATE4,859,036 A5,079,600 A**8/1989 Yamanaka et al. ........
.. 350/3361/1992 Schnur et al. ............... .. 357/45,091,047 A*2/1992AssigneerNotice:Cleeves et al.Marina V- Plat’ S31“ 1.056; Christopher2:223:35?) 2 * 15/1332 32?,F‘ Lyons’ Fremont’ Mlchael K‘5,666,189 A_*...... . . ..156/6431533529/1997 Rostoskeretal. .......... .. 355/53Templeton’ Atherton; Bhanwar S1ngh>5,702,832 AMorgan H111, 4119f CA (Us)5,714,037 A * 2/1998 Puntambekar et al.12/1997 Iwasaki et al. ........... ..
428/6115,770,500 A(*)*Jul. 23, 2002ULTRA-THIN RESIST COATING QUALITY(75>(73)US 6,423,650 B2156/643.16/1998 Batra et al. ............... .. 438/255Advanced Micro Devices, 1116-,5,807,660 A*9/1998Lin et al. . . . . .Sunnyvale, CA (US)5,831,272 A*11/1998Utsumi . . . . . . . .5,930,634 A*7/19996,020,269 A*2/2000 Wang et al. .............. .. 438/717This patent issued on a continued pros-ecution application ?led under 37 CFR1.53(d), and is subject to the tWenty yearPawnt term Provisions of 35 USC-Hause et al.. .
. . . . .. 430/313. . . . ..250/4922...... .. 438/307FOREIGN PATENT DOCUMENTSJP02172216*7/1990....... .. H01L/21/027154(a)(2).* cited by examinerSubject to any disclaimer, the term of thispatent is extended or adjusted under 35U.S.C. 154(b) by 0 days.Primary Examiner—Tuan H. NguyenAssistant Examiner—Thanhha Pham(74) Attorney, Agent, or Firm—Renner, Otto, Boisselle &(21) Appl. N0.: 09/371,715(22) Filed:Aug. 9,1999Sklar, LLP(57)(51)Int. Cl.7 ...................... ..
H01L 21/31; H01L 21/469In one embodiment, the present invention relates to a(52)US. Cl. ..................... .. 438/780; 438/665; 438/778;method of processing a semiconductor Substrate, involving(58)ABSTRACT438/798; 438/964; 438/974; 430/313the steps of providing the semiconductor substrate having anField of Search ............................... .. 438/964, 974,upper Surface; roughening the upper Surface of the Semi‘438/798, 665, 709, 710, 778, 780, 781;430/327, 318, 317, 313(56)References Citedconductor substrate so that the upper surface of the semiconductor substrate has an Rm, of about 10 A or more; anddepositing an ultra-thin photoresist on the upper surface ofthe semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 A or less.U.S. PATENT DOCUMENTS4,225,664 A*9/1980Moran et al.
............. .. 430/30610w19 Claims, 1 Drawing Sheet14CWWW14A12U.S. PatentJul. 23, 200210 \‘US 6,423,650 B214B/14A12FIG. 110 \y14014A12FIG. 212FIG. 3US 6,423,650 B212ULTRA-THIN RESIST COATING QUALITYtoresist and an upper surface of an underlying substrate,BY INCREASING SURFACE ROUGHNESSOF THE SUBSTRATEsurface of the underlying substrate so as to roughen theTECHNICAL FIELDupper surface; and depositing the ultra-thin photoresist onthe roughened upper surface of the underlying substrate,involving the steps of contacting a plasma With the upperWherein the ultra-thin photoresist has a thickness of aboutThe present invention generally relates to ultra-thin photoresist coatings that strongly adhere to underlying substrates.
In particular, the present invention relates to increasing the surface roughness of an underlying substrate andapplying an ultra-thin photoresist coating over the rough2,000 A or less.In yet another embodiment, the present invention relatesto a method of increasing adhesion betWeen an ultra-thin10ened surface.BACKGROUND ARTphotoresist and an upper surface of an underlying substrate,involving the steps of contacting an acid solution With theupper surface of the underlying substrate so as to roughenthe upper surface, the roughened upper surface of theunderlying substrate has an Rim of about 25 A or more; andAs the trend toWard smaller and smaller semiconductor 15 depositing the ultra-thin photoresist on the roughened upperdevice dimensions continues, there is a constant demand tosurface of the underlying substrate, Wherein the ultra-thinimprove the methods of fabricating and processing suchdevices.
For example, improvements in photolithographytechniques lead to thinner gates, smaller vias, thinner linesand high density devices among other desirable features.Photolithography techniques can be improved by increasingresolution and increasing critical dimension control. Resolution and critical dimension control are affected by thethickness of a photoresist coating or layer. Therefore,attempts are made to decrease the thickness of photoresistcoatings in order to achieve better resolution and criticaldimension control.HoWever, there are limitations associated With makingthin photoresist layers. This is because various dif?cultiesare associated With using thin photoresist layers.
One dif?culty is defect density or the occurrence of pinholes in thinphotoresist has a thickness of about 2,000 A or less.BRIEF DESCRIPTION OF DRAWINGS20FIG. 1 illustrates a cross-sectional vieW of a portion of asemiconductor substrate according to one aspect of thepresent invention.FIG. 2 illustrates a cross-sectional vieW of a portion of a25FIG. 3 illustrates a cross-sectional vieW of a roughenedsemiconductor substrate having an ultra-thin photoresistthereon according to one aspect of the present invention.30DISCLOSURE OF INVENTIONphotoresist layers. Another dif?culty associated With thinThe present invention involves increasing the surfacephotoresist layers is deWetting.
That is, the photoresist layermay pull back from the edge of the Wafer or substrate during?nal spin, deWet around topography (poor step coverage) or35lose adhesion in other areas of the Wafer. DeWetting thusleads to incomplete or poor pattern formation. Yet anothertoresist over a substrate Wherein there is strong adhesionimproving photolithographic techniques. Even during ?nal40decreases. Photoresists that are not uniformly coated onThe present invention provides ultra-thin photoresist coatings that strongly adhere to underlying substrates due to thesurface roughness of an underlying substrate. The presentinvention thus also provides substrates having ultra-thinphotoresists, on the order of 500 A to 2,000 A in thickness,that can be patterned With extremely high resolutionenabling the production of thinner gates, smaller vias, thinner trenches, thinner lines, smaller devices and high densitydevices.
The present invention also provides ultra-thin photoresist coatings that uniformly coat underlying substrates.The upper surface of the substrate surface over Which an45connection include one or more of conductive layers, semidevices generally include one or more of active elements50and passive elements such as polysilicon gates, Word lines,source regions, drain regions, bit lines, bases, emitters,collectors, conductive lines, conductive plugs, etc.In one embodiment, the upper surface of the substrate isor contains a silicon containing layer.
Silicon containing55layers include monocrystalline silicon, doped or undopedpolysilicon, amorphous silicon, silicon oxide, silicon nitride,silicon oxynitride and silicides. In another embodiment, theupper surface of the substrate is or contains a metal con60conductor substrate so that the upper surface of the semiconductor substrate has an Rim of about 10 A or more; anddepositing an ultra-thin photoresist on the upper surface oftaining layer. Metal containing layers include metal layers,metal alloy layers, metal silicide layers, metal oxide layers,metal nitride layers. Examples of metal containing layersinclude one or more of aluminum, copper, gold, nickel,the semiconductor substrate, the ultra-thin photoresist having a thickness of about 2,000 A or less.In another embodiment, the present invention relates to amethod of increasing adhesion betWeen an ultra-thin phoultra-thin photoresist is deposited may contain any layer ordevice used in semiconductors.
Semiconductor layers in thisconducting layers, and dielectric layers. SemiconductorIn one embodiment, the present invention relates to amethod of processing a semiconductor substrate, involvingthe steps of providing the semiconductor substrate having anupper surface; roughening the upper surface of the semispin after application of an ultra-thin photoresist, strongadhesion is maintained betWeen the ultra-thin photoresistand the substrate at all areas of the substrate including thecenter and outer edges.substrates lead to decreased resolution and loss of criticaldimension control.SUMMARY OF THE INVENTIONroughness of the upper surface of a substrate prior toapplying an ultra-thin photoresist thereto.
The present invention more speci?cally involves providing an ultra-thin phobetWeen the ultra-thin photoresist and the substrate, therebydif?culty associated With thin photoresist layers is the inability to provide a uniformly coated substrate. The thinner aphotoresist becomes, the ability to uniformly coat a substratesemiconductor substrate having a roughened surface according to one aspect of the present invention.65palladium, platinum, silver, tantalum, titanium, tungsten,Zinc, aluminum-copper alloys, aluminum alloys, copperalloys, titanium alloys, tungsten alloys, titanium-tungstenalloys, gold alloys, nickel alloys, palladium alloys, platinumalloys, silver alloys, tantalum alloys, and Zinc alloys, andUS 6,423,650 B234suicides, nitrides and oxides thereof. Speci?c examples ofcontacted With the substrate is from about 1 sccm to about4,000 sccm.
In another embodiment, the How rate of theplasma contacted With the substrate is from about 10 sccmmetal containing layers, in addition to the metals and metalalloys listed above, include one or more of tantalum oxide,to about 1,000 sccm. In yet another embodiment, the Howrate of the plasma contacted With the substrate is from abouttitanium oxide, titanium silicide, tungsten silicide, and titanium nitride.In yet another embodiment, the upper surface of the20 sccm to about 500 sccm.The substrate is contacted With the plasma at a temperature suf?cient to roughen the surface so that the surface hassubstrate is or contains a dieletric material.
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