ATmega128 (961723), страница 55
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The program code withinthe Boot Loader section has the capability to write into the entire Flash, including theBoot Loader memory. The Boot Loader can thus even modify itself, and it can alsoerase itself from the code if the feature is not needed anymore. The size of the BootLoader memory is configurable with fuses and the Boot Loader has two separate sets ofBoot Lock bits which can be set independently.
This gives the user a unique flexibility toselect different levels of protection.Boot Loader Features•••••••Read-While-Write Self-ProgrammingFlexible Boot Memory SizeHigh Security (Separate Boot Lock Bits for a Flexible Protection)Separate Fuse to Select Reset VectorOptimized Page(1) SizeCode Efficient AlgorithmEfficient Read-Modify-Write SupportNote:1. A page is a section in the flash consisting of several bytes (see Table 123 on page293) used during programming. The page organization does not affect normaloperation.Application and BootLoader Flash SectionsThe Flash memory is organized in two main sections, the Application section and theBoot Loader section (see Figure 133).
The size of the different sections is configured bythe BOOTSZ fuses as shown in Table on page 286 and Figure 133. These two sectionscan have different level of protection since they have different sets of Lock bits.Application SectionThe application section is the section of the Flash that is used for storing the applicationcode. The protection level for the application section can be selected by the applicationBoot Lock bits (Boot Lock bits 0), see Table on page 277.
The application section cannever store any Boot Loader code since the SPM instruction is disabled when executedfrom the application section.Boot Loader Section – BLSWhile the application section is used for storing the application code, the The BootLoader software must be located in the BLS since the SPM instruction can initiate a programming when executing from the BLS only. The SPM instruction can access theentire Flash, including the BLS itself. The protection level for the Boot Loader sectioncan be selected by the Boot Loader Lock bits (Boot Lock bits 1), see Table 109 on page278.Read-While-Write and No Whether the CPU supports Read-While-Write or if the CPU is halted during a BootLoader software update is dependent on which address that is being programmed.
InRead-While-Write Flashaddition to the two sections that are configurable by the BOOTSZ fuses as describedSectionsabove, the Flash is also divided into two fixed sections, the Read-While-Write (RWW)section and the No Read-While-Write (NRWW) section. The limit between the RWWand NRWW sections is given in Table Note: on page 286 and Figure 133 on page 277.The main difference between the two sections is:•When erasing or writing a page located inside the RWW section, the NRWW sectioncan be read during the operation.•When erasing or writing a page located inside the NRWW section, the CPU is haltedduring the entire operation.2752467M–AVR–11/04Note that the user software can never read any code that is located inside the RWWsection during a Boot Loader software operation.
The syntax “Read-While-Write section” refers to which section that is being programmed (erased or written), not whichsection that actually is being read during a Boot Loader software update.Read-While-Write Section –RWWIf a Boot Loader software update is programming a page inside the RWW section, it ispossible to read code from the Flash, but only code that is located in the NRWW section. During an on-going programming, the software must ensure that the RWW sectionnever is being read. If the user software is trying to read code that is located inside theRWW section (i.e., by a call/jmp/lpm or an interrupt) during programming, the softwaremight end up in an unknown state. To avoid this, the interrupts should either be disabledor moved to the Boot Loader Section. The Boot Loader section is always located in theNRWW section.
The RWW Section Busy bit (RWWSB) in the Store Program MemoryControl and Status Register (SPMCSR) will be read as logical one as long as the RWWsection is blocked for reading. After a programming is completed, the RWWSB must becleared by software before reading code located in the RWW section. See “Store Program Memory Control and Status Register – SPMCSR” on page 279. for details on howto clear RWWSB.No Read-While-Write Section– NRWWThe code located in the NRWW section can be read when the Boot Loader software isupdating a page in the RWW section. When the Boot Loader code updates the NRWWsection, the CPU is halted during the entire page erase or page write operation.Table 107.
Read-While-Write FeaturesWhich Section does the Zpointer Address During theProgramming?Which Section can beRead DuringProgramming?Is the CPUHalted?Read-WhileWriteSupported?RWW sectionNRWW sectionNoYesNRWW sectionNoneYesNoFigure 132. Read-While-Write vs. No Read-While-WriteRead-While-Write(RWW) SectionZ-pointerAddresses RWWSectionZ-pointerAddresses NRWWSectionNo Read-While-Write(NRWW) SectionCPU is HaltedDuring the OperationCode Located inNRWW SectionCan be Read Duringthe Operation276ATmega1282467M–AVR–11/04ATmega128Figure 133.
Memory Sections(1)Program MemoryBOOTSZ = '10'Program MemoryBOOTSZ = '11'$0000No Read-While-Write SectionRead-While-Write SectionApplication Flash SectionEnd RWWStart NRWWApplication Flash SectionBoot Loader Flash SectionEnd ApplicationStart Boot LoaderFlashendNo Read-While-Write SectionRead-While-Write Section$0000Program MemoryBOOTSZ = '01'Application Flash SectionEnd RWWStart NRWWApplication Flash SectionEnd ApplicationStart Boot LoaderBoot Loader Flash SectionFlashendProgram MemoryBOOTSZ = '00'No Read-While-Write SectionBoot Loader Lock BitsRead-While-Write SectionApplication Flash SectionEnd RWWStart NRWWApplication Flash SectionEnd ApplicationStart Boot LoaderBoot Loader Flash SectionFlashendNote:$0000No Read-While-Write SectionRead-While-Write Section$0000Application flash SectionEnd RWW, End ApplicationStart NRWW, Start Boot LoaderBoot Loader Flash SectionFlashend1.
The parameters in the figure above are given in Table on page 286.If no Boot Loader capability is needed, the entire Flash is available for application code.The Boot Loader has two separate sets of Boot Lock bits which can be set independently. This gives the user a unique flexibility to select different levels of protection.The user can select:•To protect the entire Flash from a software update by the MCU•To protect only the Boot Loader Flash section from a software update by the MCU•To protect only the Application Flash section from a software update by the MCU•Allow software update in the entire FlashSee Table 108 and Table 109 for further details. The Boot Lock bits can be set in software and in Serial or Parallel Programming mode, but they can be cleared by a chiperase command only. The general Write Lock (Lock bit mode 2) does not control theprogramming of the Flash memory by SPM instruction.
Similarly, the generalRead/Write Lock (Lock bit mode 3) does not control reading nor writing by LPM/SPM, ifit is attempted.2772467M–AVR–11/04Table 108. Boot Lock Bit0 Protection Modes (Application Section)(1)BLB0 modeBLB02BLB01111No restrictions for SPM or LPM accessing the Applicationsection.210SPM is not allowed to write to the Application section.0SPM is not allowed to write to the Application section, andLPM executing from the Boot Loader section is notallowed to read from the Application section. If interruptvectors are placed in the Boot Loader section, interruptsare disabled while executing from the Application section.1LPM executing from the Boot Loader section is notallowed to read from the Application section. If interruptvectors are placed in the Boot Loader section, interruptsare disabled while executing from the Application section.304Note:0Protection1.
“1” means unprogrammed, “0” means programmedTable 109. Boot Lock Bit1 Protection Modes (Boot Loader Section)(1)BLB1 modeBLB12BLB11111No restrictions for SPM or LPM accessing the Boot Loadersection.210SPM is not allowed to write to the Boot Loader section.0SPM is not allowed to write to the Boot Loader section,and LPM executing from the Application section is notallowed to read from the Boot Loader section. If interruptvectors are placed in the Application section, interrupts aredisabled while executing from the Boot Loader section.1LPM executing from the Application section is not allowedto read from the Boot Loader section.
If interrupt vectorsare placed in the Application section, interrupts aredisabled while executing from the Boot Loader section.304Note:0Protection1. “1” means unprogrammed, “0´means programmedEntering the Boot Loader Entering the Boot Loader takes place by a jump or call from the application program.This may be initiated by a trigger such as a command received via USART, or SPI interProgramface.
Alternatively, the Boot Reset Fuse can be programmed so that the Reset VectorReset is pointing to the Boot Flash start address after a reset. In this case, the BootLoader is started after a reset. After the application code is loaded, the program canstart executing the application code. Note that the fuses cannot be changed by the MCUitself. This means that once the Boot Reset Fuse is programmed, the Reset Vector willalways point to the Boot Loader Reset and the fuse can only be changed through theserial or parallel programming interface.Table 110. Boot Reset Fuse(1)BOOTRSTNote:278Reset Address1Reset Vector = Application Reset (address $0000)0Reset Vector = Boot Loader Reset (see Table 112 on page 286)1.
“1” means unprogrammed, “0´means programmedATmega1282467M–AVR–11/04ATmega128Store Program MemoryControl and Status Register –SPMCSRThe Store Program Memory Control and Status Register contains the control bitsneeded to control the Boot Loader operations.Bit76543210SPMIERWWSB–RWWSREBLBSETPGWRTPGERSSPMENRead/WriteR/WRRR/WR/WR/WR/WR/WInitial Value00000000SPMCSR• Bit 7 – SPMIE: SPM Interrupt EnableWhen the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), theSPM ready interrupt will be enabled.
The SPM ready Interrupt will be executed as longas the SPMEN bit in the SPMCSR Register is cleared.• Bit 6 – RWWSB: Read-While-Write Section BusyWhen a Self-Programming (page erase or page write) operation to the RWW section isinitiated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, theRWW section cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bitis written to one after a self-programming operation is completed.
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