Volume 1 Application Programming (794095), страница 53
Текст из файла (страница 53)
See “Data Alignment” on page 40 for details.5.5.5 Integer Data TypesMost of the MMX instructions support operations on the integer data types shown in Figure 5-8 onpage 202. These instructions are summarized in “Instruction Summary—Integer Instructions” onpage 207. The characteristics of these data types are described below.Sign. Many of the 64-bit media instructions have variants for operating on signed or unsignedintegers. For signed integers, the sign bit is the most-significant bit—bit 7 for a byte, bit 15 for a word,bit 31 for a doubleword, or bit 63 for a quadword.
Arithmetic instructions that are not specificallynamed as unsigned perform signed two’s-complement arithmetic.Maximum and Minimum Representable Values. Table 5-1 shows the range of representable valuesfor the integer data types.Table 5-1.Range of Values in 64-Bit Media Integer Data TypesData-Type InterpretationUnsignedintegersBase-2 (exact)Byte0 to+28–1Word0 to+216–1Doubleword0 to+232–1Quadword0 to +264–10 to 2550 to 65,5350 to 4.29 * 1090 to 1.84 * 1019Base-2 (exact)–27 to +(27–1)–215 to+(215–1)–231 to +(231–1)–263 to +(263–1)Base-10 (approx.)–128 to +127–32,768 to+32,767–2.14 * 109 to+2.14 * 109–9.22 * 1018to +9.22 * 1018Base-10 (approx.)Signed integers1Saturation.
Saturating (also called limiting or clamping) instructions limit the value of a result to themaximum or minimum value representable by the destination data type. Saturating versions of integervector-arithmetic instructions operate on byte-sized and word-sized elements. These instructions—forexample, PADDSx, PADDUSx, PSUBSx, and PSUBUSx—saturate signed or unsigned dataindependently for each element in a vector when the element reaches its maximum or minimumrepresentable value. Saturation avoids overflow or underflow errors.The examples in Table 5-2 on page 205 illustrate saturating and non-saturating results with wordoperands.
Saturation for other data-type sizes follows similar rules. Once saturated, the saturated valueis treated like any other value of its type. For example, if 0001h is subtracted from the saturated value,7FFFh, the result is 7FFEh.20464-Bit Media Programming24592—Rev. 3.13—July 2007Table 5-2.AMD64 TechnologySaturation ExamplesOperationNon-SaturatedInfinitely PreciseResultSaturatedSigned ResultSaturatedUnsigned Result7000h + 2000h9000h7FFFh9000h7000h + 7000hE000h7FFFhE000hF000h + F000h1E000hE000hFFFFh9000h + 9000h12000h8000hFFFFh7FFFh + 0100h80FFh7FFFh80FFh7FFFh + FF00h17EFFh7EFFhFFFFhArithmetic instructions not specifically designated as saturating perform non-saturating, two’scomplement arithmetic.Rounding.
There is a rounding version of the integer vector-multiply instruction, PMULHRW, thatmultiplies pairs of signed-integer word elements and then adds 8000h to the lower word of thedoubleword result, thus rounding the high-order word which is returned as the result.Other Fixed-Point Operands. The architecture provides specific support only for integer fixed-pointoperands—those in which an implied binary point is located to the right of bit 0. Nevertheless,software may use fixed-point operands in which the implied binary point is located in any position. Insuch cases, software is responsible for managing the interpretation of such implied binary points, aswell as any redundant sign bits that may occur during multiplication.5.5.6 Floating-Point Data TypesAll 64-bit media 3DNow! instructions, except PFRCP and PFRSQRT, take 64-bit vector operands.They operate in parallel on two single-precision (32-bit) floating-point values contained in thosevectors.Figure 5-9 shows the format of the vector operands.
The characteristics of the single-precisionfloating-point data types are described below. The 64-bit floating-point media instructions aresummarized in “Instruction Summary—Floating-Point Instructions” on page 223.63 62S55 54BiasedExponent32 31 30Significand(also Fraction)S = Sign BitFigure 5-9.64-Bit Media ProgrammingS023 22BiasedExponentSignificand(also Fraction)S = Sign Bit64-Bit Floating-Point (3DNow!™) Vector Operand205AMD64 Technology24592—Rev. 3.13—July 2007Single-Precision Format. The single-precision floating-point format supported by 64-bit mediainstructions is the same format as the normalized IEEE 754 single-precision format. This formatincludes a sign bit, an 8-bit biased exponent, and a 23-bit significand with one hidden integer bit for atotal of 24 bits in the significand. The hidden integer bit is assumed to have a value of 1, and thesignificand field is also the fraction.
The bias of the exponent is 127. However, the 3DNow! formatdoes not support other aspects of the IEEE 754 standard, such as multiple rounding modes,representation of numbers other than normalized numbers, and floating-point exceptions.Range of Representable Values and Saturation. Table 5-3 shows the range of representablevalues for 64-bit media floating-point data. Table 5-4 shows the exponent ranges. The largestrepresentable positive normal number has an exponent of FEh and a significand of 7FFFFFh, with anumerical value of 2127 * (2 – 2–23). The smallest representable negative normal number has anexponent of 01h and a significand of 000000h, with a numerical value of 2–126.Table 5-3.
Range of Values in 64-Bit Media Floating-Point Data TypesData-Type InterpretationFloating-pointBase-2 (exact)Base-10 (approx.)Table 5-4.Doubleword2–126to 21.17 * 10127–38* (2 – 2Quadword–23)to +3.40 * 103864-Bit Floating-Point Exponent RangesBiased ExponentDescriptionFFhUnsupported100hZero00h<x<FFh01hFEhTwo single-precision floatingpoint doublewordsNormal22(1–127)lowest possible exponent(254–127)largest possible exponentNote:1.
Unsupported numbers can be used as source operands but produce undefinedresults.Results that, after rounding, overflow above the maximum-representable positive or negative numberare saturated (limited or clamped) at the maximum positive or negative number.
Results that underflowbelow the minimum-representable positive or negative number are treated as zero.Floating-Point Rounding. In contrast to the IEEE standard, which requires four rounding modes, the64-bit media floating-point instructions support only one rounding mode, depending on theinstruction. All such instructions use round-to-nearest, except certain floating-point-to-integerconversion instructions (“Data Conversion” on page 224) which use round-to-zero.No Support for Infinities, NaNs, and Denormals. 64-bit media floating-point instructions supportonly normalized numbers. They do not support infinity, NaN, and denormalized numberrepresentations.
Operations on such numbers produce undefined results, and no exceptions are20664-Bit Media Programming24592—Rev. 3.13—July 2007AMD64 Technologygenerated. If all source operands are normalized numbers, these instructions never produce infinities,NaNs, or denormalized numbers as results.This aspect of 64-bit media floating-point operations does not comply with the IEEE 754 standard.Software must use only normalized operands and ensure that computations remain within validnormalized-number ranges.No Support for Floating-Point Exceptions. The 64-bit media floating-point instructions do notgenerate floating-point exceptions. Software must ensure that in-range operands are provided to theseinstructions.5.6Instruction Summary—Integer InstructionsThis section summarizes the functions of the integer (MMX and a few SSE and SSE2) instructions inthe 64-bit media instruction subset.
These include integer instructions that use an MMX register forsource or destination and data-conversion instructions that convert from integers to floating-pointformats. For a summary of the floating-point instructions in the 64-bit media instruction subset,including data-conversion instructions that convert from floating-point to integer formats, see“Instruction Summary—Floating-Point Instructions” on page 223.The instructions are organized here by functional group—such as data-transfer, vector arithmetic, andso on. Software running at any privilege level can use any of these instructions, if the CPUIDinstruction reports support for the instructions (see “Feature Detection” on page 229).
More detail onindividual instructions is given in the alphabetically organized “64-Bit Media Instruction Reference”in Volume 5.5.6.1 SyntaxEach instruction has a mnemonic syntax used by assemblers to specify the operation and the operandsto be used for source and destination (result) data. The majority of 64-bit media integer instructionshave the following syntax:MNEMONIC mmx1, mmx2/mem64Figure 5-10 on page 208 shows an example of the mnemonic syntax for a packed add bytes (PADDB)instruction.64-Bit Media Programming207AMD64 Technology24592—Rev. 3.13—July 2007PADDB mmx1, mmx2/mem64MnemonicFirst Source Operandand Destination OperandSecond Source OperandFigure 5-10.513-142.epsMnemonic Syntax for Typical InstructionThis example shows the PADDB mnemonic followed by two operands, a 64-bit MMX registeroperand and another 64-bit MMX register or 64-bit memory operand.
![](https://s.studizba.com/z.php?f=/templates/si/i/noavatar.png&w=100&h=100&t=1"){kind=avatar}
