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– P. 123-134.17180.Lu C.Y., Lue H-T. State-of-the-art flash memory devices and post-flash emergingmemories / Lu C.Y., Lue H-T. // Journal of Science China. – Vol. 54. – No. 5. – 2011.– P. 1039-1060.81.Lai S.C., Lue H.T., Yang M.J., et al. MA BE SONOS: A bandgap engineered SONOSusing metal gate and Al2O3 blocking layer to overcome erase saturation / Lai S.C., LueH.T., Yang M.J., et al. // IEEE Non-Volatile Semiconductor Memory Workshop(NVSMW). – 2007. – P. 88-89.82.Liu Y., Nabatame T. Channel shape and interpoly dielectric material effects onelectrical characteristics of floating-gate-type three-dimensional fin channel flashmemories / Liu Y., Nabatame T. // Japanese Journal of Applied Physics No.54.
– 2015.– P. 4.83.Fazio A., Bauer M. Intel StrataFlash memory technology development andimplementation / Fazio A., Bauer M. // Intel Technology Journal. Q4. – 1997. – P. 114.84. Brown D. MirrorBit Technology past, present and future / Brown D. // IEEENVSMW. – Vol. 21.
– 2006. – P. 8-15.85.Eitan B. 4-bit per cell NROM reliability / Eitan B. // IEDM Technical Digest. – 2005. –P. 539-542.86.Godard B. Design for Reliability Techniques in Embedded Flash Memories / GodardB. // Micro and nanotechnologies / Microelectronics. Universite Montpellier II –Scienceset Techniques du Languedoc.
– 2008. – P. 14-45.87.Hubli R. Semiconductor manufacturing / Hubli R. // 2,5D, 3D IC Market Challengesand Opportunetles. – 2012. – P. 47.88.Marc T. Memory Integrated Circuits (IC) Market: Global Industry Analysis andOpportunity Assessment 2014 – 2020 / Marc T. // Electronics & ICT. – 2015. – P. 224.89.Shiomi H.
Introduction to Failure Physics / Shiomi H. // JUSE Press. – 1982. – P. 231.90.Vallett, D.P. IC failure analysis: the importance of test and diagnostics / Vallett, D.P. //Design & Test of Computers. – Vol.14. – issue 3. – 2002. – P. 76-82.91.Jilla S. Minimizing the Effects of Manufacturing Variation During Physical Layout /Jilla S. // Chip Design, Tools, Technologies and Methodologies. – 2008. – P. 3.17292.Macemon D. Diagnosis-driven yield analysis / Macemon D. // Test & MeasurementWorld. – 2009.
– P. 6.93.Fairchild Semiconductor. Fairchild Overview / Fairchild Semiconductor Inc. // InvestorPresentation. – 2008. – P. 68.94.Fairchild Semiconductor. Fairchild Overview / Fairchild Semiconductor Inc. // InvestorPresentation. – 2006. – P. 32.95.Fairchild Semiconductor. Fairchild Overview / Fairchild Semiconductor Inc. // InvestorPresentation. – 2007. – P. 27.96.Макушин М. Экономика уменьшения топологий / Макушин М. // ЖурналЭлектроника, наука | технология | бизнес. № 3. – 2014.
– С. 14.97.Cantor S. Entegris Reports Third-Quarter Results / Cantor S. // Entegris GlobeNewswire. – 2015. – P. 8.98.Roberts K., Weyrich M., Simon D. 2014 Global Semiconductor Industry Outlook /Roberts K., Weyrich M., Simon D. // AlixPartners. – 2014. – P. 3.99.Loy B. Entegris: A Premier Materials and Solutions Provider / Loy B. // Current ReportUnited States Securities аnd Exchange Commission. – June 2014. – P. 20.100.Loy B. 2013 Entegris: Analyst Day / Loy B.
// Entegris Globe Newswire. – June2013. – P. 103.101.Shiomi H. Introduction to Reliability Engineering / Shiomi H. // Revision 3.Maruzen. – 1995. – P. 331.102.John J. Global driver IC Market 2014 Industry Size, Trends, Demand, Growth,Share, Analysis and Forecast to 2018 / John J. // Online Herald News. – Nov. 2015. –P. 11.103.Spanos C. J. Special Issues in Semiconductor Manufacturing / Spanos C. J. //Introduction & IC Yield. – 2010. – P.99.104.Mine H., Kawai H. Fundamental Mathematics of Reliability and Integrity / MineH., Kawai H.
// JUSE Press. – 1984. – P. 131.105.Papadopoulou E., Gupta P. Yield Analysis and Optimization / Papadopoulou E.,Gupta P. // Design & Test of Computers. – 2011. – P.29.173106.Lee J.C., Chuang J.H. Fault Localization in Contact Level by Using ConductiveAtomic Force Microscopy / Lee J.C., Chuang J.H. // 29th International Symposium forTesting and Failure Analysis. – 2003.
– P. 413-417. t1 t2 t3107.Pavan P., Larcher L., Marmiroli A. Floating Gate Devices: Operation andCompact Modeling / Pavan P., Larcher L., Marmiroli A. // Kluwer AcademicPublishers. – 2004. – P. 6.108.Semiconductor Reliability Handbook / Renesas Electronics Corporation //Renesas Electronics Corporation.
Rev. 1.00. – March 2013. – P. 8.109.Brewer J.E., Gill M. Nonvolatile memory technologies with emphasis on flash /Brewer J.E., Gill M. // IEEE Press Series on Microelectronic Systems. – 2008. – P.834.110.Kuhn P. et al. A reliability methodology for low temperature data retention infloating gate non-volatile memories/ Kuhn P. et al. // 39th Annual IEEE InternationalReliability Physics Symposium. – 2001.
– P. 266-270.111.Tempel G. Abnormal charge loss of flash cells at medium temperatures / TempelG. // Non-Volatile Semiconductor Memory Workshop. – 2000. – P. 4.112.Вихрев Б.И., Герасименко Н.Н., Лебедев Н.Н. Исследование радиационныхструктурных нарушений в пленках SiO2 методом ЭПР / Вихрев Б.И.,Герасименко Н.Н., Лебедев Н.Н. // Микроэлектроника.
– 1977. – Том 6. – Вып. 1.– С. 71-74.113.Lenahan P.M. A comprehensive physically based predictive model for radiationdamage in MOS systems. IEEE Trans. on Nucl. Sci. – Vol. 45. – 1998. – P. 2413-2423.114.Lee Z.H., Lin C.J., Lai S.W. Gate Oxide Defect Localization and Analysis byUsing Conductive Atomic Force Microscopy / Lee Z.H., Lin C.J., Lai S.W. // 31stInternational Symposium for Testing and Failure Analysis. – Nov.
2005. – P. 235-238.115.DiMaria D. J., Cartier E., Buchanan D. A. Anode Hole Injection and Trapping inSilicon Dioxide / DiMaria D. J., Cartier E., Buchanan D. A. // J. Appl. Phys. – Vol. 80.– No. 1 – 1996. – P. 304–317.174116.Fischetti M. V. Model for the Generation of Positive Charge at the Si–SiO2Interface Based on Hot - Hole Injection from the Anode / Fischetti M. V. // Phys. Rev.– Vol.
31. – No. 4. – 1985. – P. 2099–2113.117.Pavan P. et al. Flash memory cells-an overview / Pavan P. et al. // Proceedings ofthe IEEE. – Vol. 85. – 1997. – P. 1248-1271.118.Kuhn P. et al. A reliability methodology for low temperature data retention infloating gate non-volatile memories / Kuhn P. et al.
// 39th Annual IEEE InternationalReliability Physics Symposium. – 2001. – P. 266-270.119.Degraeve R., Groeseneken G., De Wolf I. Oxide and Interface Degradation andBreakdown under Medium and High Field Injection Conditions: A correlation Study /Degraeve R., Groeseneken G., De Wolf I. // Microelectron. Eng. (Proc. INFOS). – Vol.28. – No.
1-4. – 2005. – P. 313-316.120.Degraeve R. et al. Analytical model for failure rate prediction due to anomalouscharge loss of flash memories / Degraeve R. et al. // IEDM Technical Digest. – 2001. –P. 32.1.1-32.1.4.121.De Blauwe J., Van Houdt J., Wellekens D. A New Quantitative Model to redictSILC - Related Disturb Characteristics in Flash EEPROM Devices / De Blauwe J., VanHoudt J., Wellekens D.
// IEDM Tech. Dig. – 1996. – P. 343–346.122.Ricco B., Gozzi G., Lanzoni M. Modeling and Simulation of Stress-InducedLeakage Current in Ultrathin SiO2 Films / Ricco B., Gozzi G., Lanzoni M. // IEEETrans. Electron Devices. – Vol. 45. – 1998. – P. 1554.123.Meena J.S. Sze S.M. Overview of emerging nonvolatile memory technologies /Meena J.S.
Sze S.M. // Open Access, NANO Review. – 2014. – P.33.124.Chimenton A., Pellati P., Olivo P. Overerase Phenomena: An Insight Into FlashMemory Reliability / Chimenton A., Pellati P., Olivo P. // Proc. IEEE. – Vol. 91. – No.4. – 2003. – P. 1454–1458.125.Naruke K., Taguchi S., Wada M. Stress Induced Leakage Current Limiting toScale Down EEPROM Tunnel Oxide Thickness / Naruke K., Taguchi S., Wada M. //IEEE IEDM Tech.
Dig . – 1988. – P. 424–427.175126.Witters J.S., Groeseneken G., Maes H.E. Degradation of Tunnel - Oxide FloatingGate EEPROM Devices and the Correlation with High Field Current InducedDegradation of Thin Gate Oxide / Witters J.S., Groeseneken G., Maes H.E. // IEEETrans. Electron Devices. – Vol. 36. – 1989. – P. 1663–1682.127.Mielke R.N. New EPROM Data Loss Mechanisms / Mielke R.N. // Proc.International Reliability Physics Symp. – 2006.
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