Сигнальный МП Motorola DSP56002 (1086189), страница 42
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If the mode bits are set to 110 respectively, the DSP will load the program RAM from the SCI. Figure 6-37 shows how the SCIis configured for receiving this code and Figure 6-37 shows the segment of bootstrapcode that is used to load from the SCI. The complete code used in the bootstrap programis given in APPENDIX A. This program (1) configures the SCI, (2) loads the programsize, (3) loads the location where the program will begin loading in program memory, and(4) loads the program.First, the SCI Control Register is set to $0302 (see Figure 5-2) which enables the transmitter and receiver and configures the SCI for 10 bits asynchronous with one start bit,8 data bits, one stop bit, and no parity.
Next, the SCI Clock Control Register is set to$C000 which configures the SCI to use external receive and transmit clocks on the SCLKpin. This clock must be 16 times the serial data rate.The next step is to receive the program size and then the starting address to load theprogram. These two numbers are three bytes each loaded least significant byte first.Each byte will be echoed back as it is received. After both numbers are loaded, the program size is in A0 and the starting address is in A1.The program is then loaded one byte at a time, least significant byte first. After loadingthe program, the operating mode is set to zero, the CCR is cleared, and the DSP beginsexecution with the first instruction that was loaded.MOTOROLAPORT CFor More Information On This Product,Go to: www.freescale.com6 - 71Freescale Semiconductor, Inc.SERIAL COMMUNICATION INTERFACE (SCI)+5 VDSP56002DRBRHACKWTMODA/IRQAFROM OPENCOLLECTORBUFFERMODC/NMIFreescale Semiconductor, Inc...MBD301*MBD301*FROMRESETFUNCTIONSerialBootstrapLoader(1 start,8 data,1 stop,no parity,LSB first)RXDTXDSCLK16xCLKRESETMBD301*FROM OPENCOLLECTORBUFFERMODB/IRQBNotes: 1.
*These diodes must be Schottky diodes.2. All resistors are 15KΩ unless noted otherwise.3. When in RESET, IRQA, IRQB and NMI mustbe deasserted by external peripherals.Figure 6-37 DSP56002 Bootstrap Example - Mode 66 - 72PORT CFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.SERIAL COMMUNICATION INTERFACE (SCI)Freescale Semiconductor, Inc...; This routine loads from the SCI.; MC:MB:MA=110 - external SCI clock; MC:MB:MA=111 - reservedSCILDMOVEP#$0302,X:SCRJMP<EXTCNOP; Configure SCI Control Reg; go to next boot rom segment; just to fill the last spaceORGPL:$100,PL:$100; starting address of 2nd ROMEXTCMOVEPMOVEP#$C000,X:SCCR#7,X:PCC; Configure SCI Clock Control Reg; Configure SCLK, TXD and RXD_SCI1DO#6,_LOOP6JCLRMOVEPJCLRMOVEPREPASR#2,X:SSR,*X:SRXL,A2#1,X:SSR,*A2,X:STXL#8A; get 3 bytes for number of; program words and 3 bytes; for the starting address; Wait for RDRF to go high; Put 8 bits in A2; Wait for TDRE to go high; echo the received byteMOVEMOVEDOA1,R0A1,R1A0,_LOOP4DOJCLRMOVEPJCLRMOVEPREPASR#3,_LOOP5#2,X:SSR,*X:SRXL,A2#1,X:SSR,*A2,X:STXL#8AMOVEMA1,P:(R0)+_LOOP6; starting address for load; save starting address; Receive program words; Wait for RDRF to go high; Put 8 bits in A2; Wait for TDRE to go high; echo the received byte_LOOP5; Store 24-bit result in P memory_LOOP4Figure 6-38 Bootstrap Code FragmentMOTOROLAPORT CFor More Information On This Product,Go to: www.freescale.com6 - 73Freescale Semiconductor, Inc.SERIAL COMMUNICATION INTERFACE (SCI)Freescale Semiconductor, Inc...6.3.11Example CircuitsThe SCI can be used in a number of configurations to connect multiple processors.
Thesynchronous mode shown in Figure 6-39 shows the DSP acting as a slave. The 8051 provides the clock that clocks data in and out of the SCI, which is possible because the SCIshift register mode timing is compatible with the timing for 8051/8096 processors.
Transmit data is changed on the negative edge of the clock, and receive data is latched on thepositive edge of the clock. A protocol must be used to prevent both processors from transmitting simultaneously. The DSP is also capable of being the master device.A multimaster system can be configured (see Figure 6-41) using a single transmit/receiveline, multidrop word format, and wired-OR. The use of wired-OR requires a pullup resistoras shown. A protocol must be used to prevent collisions. This scheme is physically thesimplest multiple DSP interconnection because it uses only one wire and one resistor.The master-slave system shown in Figure 6-40 is different in that it is full duplex. The clockpin is not required; thus, it is configured as a GPIO pin.
Communication is asynchronous.The slave’s transmitters must be wire-ORed because more than one transmitter is on oneline. The master’s transmitter does not need to be wire-ORed.CLOCK INPUT1.5 CcycTRANSMIT DATARECEIVE DATAB0XXXXXXSAMPLEB1XX0B2XX1B3XX2B4XX3B5XX4B6XX5DSP56002B7XX6XXXXXXX78051P3.0RXDTXDP3.1SCLKFigure 6-39 Synchronous Mode Example6 - 74PORT CFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.SERIAL COMMUNICATION INTERFACE (SCI)MASTER RECEIVEMASTER TRANSMITFreescale Semiconductor, Inc...MC68HC11MASTERDSP56002SLAVEDSP56002SLAVEDSP56002SLAVERXDRXDRXDRXDTXDTXDTXDTXDPC2PC2PC2PC2Figure 6-40 Master-Slave System ExampleDSP56002MASTERDSP56002MASTERTXDTXDRXDRXDPC2PC2Figure 6-41 Multimaster System ExampleMOTOROLAPORT CFor More Information On This Product,Go to: www.freescale.com6 - 75Freescale Semiconductor, Inc.SYNCHRONOUS SERIAL INTERFACE (SSI)6.4SYNCHRONOUS SERIAL INTERFACE (SSI)The synchronous serial interface (SSI) provides a full-duplex serial port for serial communication with a variety of serial devices including one or more industry-standard codecs,other DSPs, microprocessors, and peripherals which implement the Motorola SPI.Freescale Semiconductor, Inc...The user can independently define the following characteristics of the SSI: the number ofbits per word, the protocol, the clock, and the transmit/receive synchronization.The user can select among three modes: normal, on-demand, and network.
The normalmode is typically used to interface with devices on a regular or periodic basis. The data-driven on-demand mode is intended to be used to communicate with devices on a nonperiodic basis. The network mode provides time slots in addition to a bit clock and framesynchronization pulse.The SSI functions with a range of 2 to 32 words of I/O per frame in the network mode. Thismode is typically used in star or ring time division multiplex networks with other DSP56Kprocessors and/or codecs. The clock can be programmed to be continuous or gated.Since the transmitter and receiver sections of the SSI are independent, they can be programmed to be synchronous (using a common clock) or asynchronous with respect toeach other.The SSI requires up to six pins, depending on its operating mode. The most common minimum configuration is three pins: transmit data (STD), receive data (SRD) and clock (SCK).The SSI consists of independent transmitter and receiver sections and a common SSIclock generator.
Three to six pins are required for operation, depending on the operatingmode selected.The following is a short list of SSI features:• Three-Pin Interface:TXD – Transmit DataRXD – Receive DataSCLK – Serial Clock• A 10 Mbps at 40 MHz (fosc/4) serial interface• Double Buffered• User Programmable• Separate Transmit and Receive Sections• Control and Status Bits6 - 76PORT CFor More Information On This Product,Go to: www.freescale.comMOTOROLAFreescale Semiconductor, Inc.Freescale Semiconductor, Inc...SYNCHRONOUS SERIAL INTERFACE (SSI)• Interface to a Variety of Serial Devices, Including:Codecs (usually without additional logic)MC145502MC145503MC145505MC145402 (13-bit linear codec)MC145554 Family of CodecsMC145532Serial Peripherals (A/D, D/A)Most Industry-Standard A/D, D/ADSP56ADC16 (16-bit linear A/D)DSP56K to DSP56K NetworksMotorola SPI Peripherals and ProcessorsShift Registers• Interface to Time Division Multiplexed Networks without Additional Logic• Six Pins:STD SSI Transmit DataSRD SSI Receive DataSCK SSI Serial ClockSC0 Serial Control 0 (defined by SSI mode)SC1 Serial Control 1 (defined by SSI mode)SC2 Serial Control 2 (defined by SSI mode)• On-chip Programmable Functions Include:Clock – Continuous, Gated, Internal, ExternalSynchronization Signals – Bit Length and Word LengthTX/RX Timing – Synchronous, AsynchronousOperating Modes – Normal, Network, On-DemandWord Length – 8, 12, 16, 24 BitsSerial Clock and Frame Sync Generator• Four Interrupt Vectors:ReceiveReceive with ExceptionTransmitTransmit with ExceptionMOTOROLAPORT CFor More Information On This Product,Go to: www.freescale.com6 - 77Freescale Semiconductor, Inc.SYNCHRONOUS SERIAL INTERFACE (SSI)Freescale Semiconductor, Inc...This interface is descriptively named “synchronous” because all serial transfers are synchronized to a clock.
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