ATmega8 (961722), страница 42
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The application sectioncan never store any Boot Loader code since the SPM instruction is disabled when executed from the application section.BLS – Boot Loader SectionWhile the application section is used for storing the application code, the The BootLoader software must be located in the BLS since the SPM instruction can initiate a programming when executing from the BLS only. The SPM instruction can access theentire Flash, including the BLS itself. The protection level for the Boot Loader sectioncan be selected by the Boot Loader Lock Bits (Boot Lock Bits 1), see Table 79 on page209.Read-While-Write and No Whether the CPU supports Read-While-Write or if the CPU is halted during a BootLoader software update is dependent on which address that is being programmed.
InRead-While-Write Flashaddition to the two sections that are configurable by the BOOTSZ Fuses as describedSectionsabove, the Flash is also divided into two fixed sections, the Read-While-Write (RWW)section and the No Read-While-Write (NRWW) section. The limit between the RWWand NRWW sections is given in Table 83 on page 218 and Figure 102 on page 208. Themain difference between the two sections is:206•When erasing or writing a page located inside the RWW section, the NRWW sectioncan be read during the operation.•When erasing or writing a page located inside the NRWW section, the CPU is haltedduring the entire operation.ATmega8(L)2486O–AVR–10/04ATmega8(L)Note that the user software can never read any code that is located inside the RWWsection during a Boot Loader software operation.
The syntax “Read-While-Write section” refers to which section that is being programmed (erased or written), not whichsection that actually is being read during a Boot Loader software update.RWW – Read-While-WriteSectionIf a Boot Loader software update is programming a page inside the RWW section, it ispossible to read code from the Flash, but only code that is located in the NRWW section. During an on-going programming, the software must ensure that the RWW sectionnever is being read.
If the user software is trying to read code that is located inside theRWW section (i.e. by a call/rjmp/lpm or an interrupt) during programming, the softwaremight end up in an unknown state. To avoid this, the interrupts should either be disabledor moved to the Boot Loader Section. The Boot Loader Section is always located in theNRWW section.
The RWW Section Busy bit (RWWSB) in the Store Program memoryControl Register (SPMCR) will be read as logical one as long as the RWW section isblocked for reading. After a programming is completed, the RWWSB must be cleared bysoftware before reading code located in the RWW section. See “Store Program MemoryControl Register – SPMCR” on page 210. for details on how to clear RWWSB.NRWW – No Read-While-WriteSectionThe code located in the NRWW section can be read when the Boot Loader software isupdating a page in the RWW section.
When the Boot Loader code updates the NRWWsection, the CPU is halted during the entire page erase or page write operation.Table 77. Read-While-Write FeaturesWhich Section does the Zpointer Address during theProgramming?Which Section Can beRead duringProgramming?Is the CPUHalted?Read-WhileWriteSupported?RWW sectionNRWW sectionNoYesNRWW sectionNoneYesNoFigure 101. Read-While-Write vs. No Read-While-WriteRead-While-Write(RWW) SectionZ-pointerAddresses RWWsectionZ-pointerAddresses NRWWsectionNo Read-While-Write(NRWW) SectionCPU is Haltedduring the OperationCode Located inNRWW SectionCan be Read duringthe Operation2072486O–AVR–10/04Figure 102.
Memory Sections(1)Program MemoryBOOTSZ = '10'Program MemoryBOOTSZ = '11'$0000No Read-While-Write SectionRead-While-Write SectionApplication Flash SectionEnd RWWStart NRWWApplication Flash SectionBoot Loader Flash SectionEnd ApplicationStart Boot LoaderFlashendNo Read-While-Write SectionRead-While-Write Section$0000Program MemoryBOOTSZ = '01'Application Flash SectionEnd RWWStart NRWWApplication Flash SectionEnd ApplicationStart Boot LoaderBoot Loader Flash SectionFlashendProgram MemoryBOOTSZ = '00'No Read-While-Write SectionBoot Loader Lock BitsRead-While-Write SectionApplication Flash SectionEnd RWWStart NRWWApplication Flash SectionEnd ApplicationStart Boot LoaderBoot Loader Flash SectionFlashendNote:$0000No Read-While-Write SectionRead-While-Write Section$0000Application flash SectionEnd RWW, End ApplicationStart NRWW, Start Boot LoaderBoot Loader Flash SectionFlashend1.
The parameters in the figure are given in Table 82 on page 217.If no Boot Loader capability is needed, the entire Flash is available for application code.The Boot Loader has two separate sets of Boot Lock Bits which can be set independently. This gives the user a unique flexibility to select different levels of protection.The user can select:•To protect the entire Flash from a software update by the MCU.•To protect only the Boot Loader Flash section from a software update by the MCU.•To protect only the Application Flash section from a software update by the MCU.•Allow software update in the entire Flash.See Table 78 and Table 79 for further details.
The Boot Lock Bits can be set in softwareand in Serial or Parallel Programming mode, but they can be cleared by a chip erasecommand only. The general Write Lock (Lock bit mode 2) does not control the programming of the Flash memory by SPM instruction. Similarly, the general Read/Write Lock(Lock bit mode 3) does not control reading nor writing by LPM/SPM, if it is attempted.208ATmega8(L)2486O–AVR–10/04ATmega8(L)Table 78. Boot Lock Bit0 Protection Modes (Application Section)(1)BLB0ModeBLB02BLB01111No restrictions for SPM or LPM accessing the Applicationsection.210SPM is not allowed to write to the Application section.0SPM is not allowed to write to the Application section, and LPMexecuting from the Boot Loader section is not allowed to readfrom the Application section. If Interrupt Vectors are placed inthe Boot Loader section, interrupts are disabled while executingfrom the Application section.1LPM executing from the Boot Loader section is not allowed toread from the Application section.
If Interrupt Vectors are placedin the Boot Loader section, interrupts are disabled whileexecuting from the Application section.34Note:00Protection1. “1” means unprogrammed, “0” means programmedTable 79. Boot Lock Bit1 Protection Modes (Boot Loader Section)(1)BLB1ModeBLB12BLB11111No restrictions for SPM or LPM accessing the Boot Loadersection.210SPM is not allowed to write to the Boot Loader section.0SPM is not allowed to write to the Boot Loader section, and LPMexecuting from the Application section is not allowed to readfrom the Boot Loader section. If Interrupt Vectors are placed inthe Application section, interrupts are disabled while executingfrom the Boot Loader section.1LPM executing from the Application section is not allowed toread from the Boot Loader section.
If Interrupt Vectors areplaced in the Application section, interrupts are disabled whileexecuting from the Boot Loader section.34Note:00Protection1. “1” means unprogrammed, “0” means programmedEntering the Boot Loader Entering the Boot Loader takes place by a jump or call from the application program.This may be initiated by a trigger such as a command received via USART, or SPI interProgramface. Alternatively, the Boot Reset Fuse can be programmed so that the Reset Vector ispointing to the Boot Flash start address after a reset. In this case, the Boot Loader isstarted after a reset. After the application code is loaded, the program can start executing the application code.
Note that the fuses cannot be changed by the MCU itself. Thismeans that once the Boot Reset Fuse is programmed, the Reset Vector will alwayspoint to the Boot Loader Reset and the fuse can only be changed through the serial orparallel programming interface.2092486O–AVR–10/04Table 80. Boot Reset Fuse(1)BOOTRSTNote:Store Program MemoryControl Register – SPMCRReset Address1Reset Vector = Application Reset (address 0x0000)0Reset Vector = Boot Loader Reset (see Table 82 on page 217)1. “1” means unprogrammed, “0” means programmedThe Store Program memory Control Register contains the control bits needed to controlthe Boot Loader operations.Bit76543210SPMIERWWSB–RWWSREBLBSETPGWRTPGERSSPMENRead/WriteR/WRRR/WR/WR/WR/WR/WInitial Value00000000SPMCR• Bit 7 – SPMIE: SPM Interrupt EnableWhen the SPMIE bit is written to one, and the I-bit in the Status Register is set (one), theSPM ready interrupt will be enabled.
The SPM ready Interrupt will be executed as longas the SPMEN bit in the SPMCR Register is cleared.• Bit 6 – RWWSB: Read-While-Write Section BusyWhen a Self-Programming (page erase or page write) operation to the RWW section isinitiated, the RWWSB will be set (one) by hardware. When the RWWSB bit is set, theRWW section cannot be accessed. The RWWSB bit will be cleared if the RWWSRE bitis written to one after a Self-Programming operation is completed. Alternatively theRWWSB bit will automatically be cleared if a page load operation is initiated.• Bit 5 – Res: Reserved BitThis bit is a reserved bit in the ATmega8 and always read as zero.• Bit 4 – RWWSRE: Read-While-Write Section Read EnableWhen programming (page erase or page write) to the RWW section, the RWW sectionis blocked for reading (the RWWSB will be set by hardware).
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